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9110126620
Removed upstreamed: generic/pending-5.15/722-net-mt7531-only-do-PLL-once-after-the-reset.patch[1] bcm53xx/patches-5.15/082-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch[2] All other patches automatically rebased Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200, mvebu/cortexa72 Run-tested: bcm2711/RPi4B, mt7622/RT3200, mvebu/cortexa72 (RB5009UG+S+IN) 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.72&id=5de02ab84aeca765da0e4d8e999af35325ac67c2 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.72&id=ab5c5787ab5ecdc4a7ea20b4ef542579e1beb49d Signed-off-by: John Audia <therealgraysky@proton.me>
132 lines
4.5 KiB
Diff
132 lines
4.5 KiB
Diff
From 1c2211cb15dd3957fb26c0e1615eceb5db851ad6 Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Mon, 11 Apr 2022 10:46:22 +0100
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Subject: [PATCH 06/13] net: dsa: mt7530: switch to use phylink_get_linkmodes()
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Switch mt7530 to use phylink_get_linkmodes() to generate the ethtool
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linkmodes that can be supported. We are unable to use the generic
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helper for this as pause modes are dependent on the interface as
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the Autoneg bit depends on the interface mode.
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Tested-by: Marek Behún <kabel@kernel.org>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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drivers/net/dsa/mt7530.c | 57 ++++------------------------------------
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1 file changed, 5 insertions(+), 52 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2522,19 +2522,6 @@ static int mt7531_rgmii_setup(struct mt7
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return 0;
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}
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-static void mt7531_sgmii_validate(struct mt7530_priv *priv, int port,
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- phy_interface_t interface,
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- unsigned long *supported)
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-{
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- /* Port5 supports ethier RGMII or SGMII.
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- * Port6 supports SGMII only.
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- */
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- if (port == 6 && interface == PHY_INTERFACE_MODE_2500BASEX) {
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- phylink_set(supported, 2500baseX_Full);
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- phylink_set(supported, 2500baseT_Full);
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- }
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-}
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-
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static void
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mt7531_sgmii_link_up_force(struct dsa_switch *ds, int port,
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unsigned int mode, phy_interface_t interface,
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@@ -2901,51 +2888,21 @@ static void mt753x_phylink_get_caps(stru
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}
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static void
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-mt7530_mac_port_validate(struct dsa_switch *ds, int port,
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- phy_interface_t interface,
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- unsigned long *supported)
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-{
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-}
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-
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-static void mt7531_mac_port_validate(struct dsa_switch *ds, int port,
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- phy_interface_t interface,
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- unsigned long *supported)
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-{
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- struct mt7530_priv *priv = ds->priv;
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-
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- mt7531_sgmii_validate(priv, port, interface, supported);
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-}
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-
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-static void
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mt753x_phylink_validate(struct dsa_switch *ds, int port,
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unsigned long *supported,
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struct phylink_link_state *state)
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{
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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- struct mt7530_priv *priv = ds->priv;
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+ u32 caps;
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+
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+ caps = dsa_to_port(ds, port)->pl_config.mac_capabilities;
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phylink_set_port_modes(mask);
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+ phylink_get_linkmodes(mask, state->interface, caps);
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if (state->interface != PHY_INTERFACE_MODE_TRGMII &&
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- !phy_interface_mode_is_8023z(state->interface)) {
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- phylink_set(mask, 10baseT_Half);
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- phylink_set(mask, 10baseT_Full);
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- phylink_set(mask, 100baseT_Half);
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- phylink_set(mask, 100baseT_Full);
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+ !phy_interface_mode_is_8023z(state->interface))
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phylink_set(mask, Autoneg);
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- }
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-
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- /* This switch only supports 1G full-duplex. */
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- if (state->interface != PHY_INTERFACE_MODE_MII &&
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- state->interface != PHY_INTERFACE_MODE_2500BASEX) {
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- phylink_set(mask, 1000baseT_Full);
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- phylink_set(mask, 1000baseX_Full);
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- }
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-
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- priv->info->mac_port_validate(ds, port, state->interface, mask);
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-
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- phylink_set(mask, Pause);
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- phylink_set(mask, Asym_Pause);
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linkmode_and(supported, supported, mask);
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linkmode_and(state->advertising, state->advertising, mask);
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@@ -3146,7 +3103,6 @@ static const struct mt753x_info mt753x_t
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.phy_write = mt7530_phy_write,
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.pad_setup = mt7530_pad_clk_setup,
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.mac_port_get_caps = mt7530_mac_port_get_caps,
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- .mac_port_validate = mt7530_mac_port_validate,
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.mac_port_get_state = mt7530_phylink_mac_link_state,
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.mac_port_config = mt7530_mac_config,
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},
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@@ -3157,7 +3113,6 @@ static const struct mt753x_info mt753x_t
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.phy_write = mt7530_phy_write,
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.pad_setup = mt7530_pad_clk_setup,
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.mac_port_get_caps = mt7530_mac_port_get_caps,
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- .mac_port_validate = mt7530_mac_port_validate,
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.mac_port_get_state = mt7530_phylink_mac_link_state,
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.mac_port_config = mt7530_mac_config,
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},
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@@ -3169,7 +3124,6 @@ static const struct mt753x_info mt753x_t
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.pad_setup = mt7531_pad_setup,
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.cpu_port_config = mt7531_cpu_port_config,
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.mac_port_get_caps = mt7531_mac_port_get_caps,
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- .mac_port_validate = mt7531_mac_port_validate,
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.mac_port_get_state = mt7531_phylink_mac_link_state,
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.mac_port_config = mt7531_mac_config,
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.mac_pcs_an_restart = mt7531_sgmii_restart_an,
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@@ -3231,7 +3185,6 @@ mt7530_probe(struct mdio_device *mdiodev
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if (!priv->info->sw_setup || !priv->info->pad_setup ||
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!priv->info->phy_read || !priv->info->phy_write ||
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!priv->info->mac_port_get_caps ||
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- !priv->info->mac_port_validate ||
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!priv->info->mac_port_get_state || !priv->info->mac_port_config)
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return -EINVAL;
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