mirror of
https://github.com/openwrt/openwrt.git
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928da83f5b
SVN-Revision: 21459
283 lines
7.7 KiB
Diff
283 lines
7.7 KiB
Diff
This patch adds a new GPIO driver for the RDC321x SoC GPIO controller.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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---
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Changes from v2:
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- initialize spinlock earlier
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- do not declare and assign gpch variables on the same line
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- use the pci_dev pointer passed as platform data
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- replaced rdc321x_pci_{read,write}
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--- a/drivers/gpio/Kconfig
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+++ b/drivers/gpio/Kconfig
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@@ -161,6 +161,14 @@ config GPIO_BT8XX
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If unsure, say N.
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+config GPIO_RDC321X
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+ tristate "RDC R-321x GPIO support"
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+ depends on PCI && GPIOLIB
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+ select MFD_RDC321X
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+ help
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+ Support for the RDC R321x SoC GPIOs over southbridge
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+ PCI configuration space.
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+
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comment "SPI GPIO expanders:"
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config GPIO_MAX7301
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--- a/drivers/gpio/Makefile
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+++ b/drivers/gpio/Makefile
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@@ -12,3 +12,4 @@ obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
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obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o
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obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o
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obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
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+obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o
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--- /dev/null
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+++ b/drivers/gpio/rdc321x-gpio.c
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@@ -0,0 +1,245 @@
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+/*
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+ * RDC321x GPIO driver
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+ *
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+ * Copyright (C) 2008, Volker Weiss <dev@tintuc.de>
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+ * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ *
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+ */
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+#include <linux/module.h>
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/spinlock.h>
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+#include <linux/platform_device.h>
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+#include <linux/pci.h>
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+#include <linux/gpio.h>
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+#include <linux/mfd/rdc321x.h>
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+
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+struct rdc321x_gpio {
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+ spinlock_t lock;
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+ struct pci_dev *sb_pdev;
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+ u32 data_reg[2];
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+ int reg1_ctrl_base;
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+ int reg1_data_base;
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+ int reg2_ctrl_base;
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+ int reg2_data_base;
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+ struct gpio_chip chip;
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+};
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+
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+/* read GPIO pin */
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+static int rdc_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
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+{
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+ struct rdc321x_gpio *gpch;
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+ u32 value = 0;
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+ int reg;
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+
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+ gpch = container_of(chip, struct rdc321x_gpio, chip);
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+ reg = gpio < 32 ? gpch->reg1_data_base : gpch->reg2_data_base;
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+
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+ spin_lock(&gpch->lock);
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+ pci_write_config_dword(gpch->sb_pdev, reg,
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+ gpch->data_reg[gpio < 32 ? 0 : 1]);
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+ pci_read_config_dword(gpch->sb_pdev, reg, &value);
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+ spin_unlock(&gpch->lock);
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+
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+ return (1 << (gpio & 0x1f)) & value ? 1 : 0;
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+}
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+
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+static void rdc_gpio_set_value_impl(struct gpio_chip *chip,
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+ unsigned gpio, int value)
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+{
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+ struct rdc321x_gpio *gpch;
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+ int reg = (gpio < 32) ? 0 : 1;
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+
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+ gpch = container_of(chip, struct rdc321x_gpio, chip);
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+
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+ if (value)
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+ gpch->data_reg[reg] |= 1 << (gpio & 0x1f);
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+ else
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+ gpch->data_reg[reg] &= ~(1 << (gpio & 0x1f));
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+
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+ pci_write_config_dword(gpch->sb_pdev,
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+ reg ? gpch->reg2_data_base : gpch->reg1_data_base,
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+ gpch->data_reg[reg]);
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+}
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+
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+/* set GPIO pin to value */
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+static void rdc_gpio_set_value(struct gpio_chip *chip,
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+ unsigned gpio, int value)
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+{
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+ struct rdc321x_gpio *gpch;
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+
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+ gpch = container_of(chip, struct rdc321x_gpio, chip);
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+ spin_lock(&gpch->lock);
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+ rdc_gpio_set_value_impl(chip, gpio, value);
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+ spin_unlock(&gpch->lock);
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+}
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+
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+static int rdc_gpio_config(struct gpio_chip *chip,
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+ unsigned gpio, int value)
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+{
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+ struct rdc321x_gpio *gpch;
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+ int err;
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+ u32 reg;
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+
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+ gpch = container_of(chip, struct rdc321x_gpio, chip);
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+
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+ spin_lock(&gpch->lock);
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+ err = pci_read_config_dword(gpch->sb_pdev, gpio < 32 ?
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+ gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, ®);
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+ if (err)
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+ goto unlock;
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+
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+ reg |= 1 << (gpio & 0x1f);
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+
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+ err = pci_write_config_dword(gpch->sb_pdev, gpio < 32 ?
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+ gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, reg);
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+ if (err)
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+ goto unlock;
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+
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+ rdc_gpio_set_value_impl(chip, gpio, value);
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+
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+unlock:
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+ spin_unlock(&gpch->lock);
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+
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+ return err;
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+}
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+
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+/* configure GPIO pin as input */
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+static int rdc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
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+{
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+ return rdc_gpio_config(chip, gpio, 1);
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+}
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+
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+/*
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+ * Cache the initial value of both GPIO data registers
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+ */
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+static int __devinit rdc321x_gpio_probe(struct platform_device *pdev)
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+{
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+ int err;
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+ struct resource *r;
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+ struct rdc321x_gpio *rdc321x_gpio_dev;
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+ struct rdc321x_gpio_pdata *pdata;
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+
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+ pdata = pdev->dev.driver_data;
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+ if (!pdata) {
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+ dev_err(&pdev->dev, "no platform data supplied\n");
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+ return -ENODEV;
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+ }
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+
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+ rdc321x_gpio_dev = kzalloc(sizeof(struct rdc321x_gpio), GFP_KERNEL);
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+ if (!rdc321x_gpio_dev) {
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+ dev_err(&pdev->dev, "failed to allocate private data\n");
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+ return -ENOMEM;
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+ }
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+
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+ r = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpio-reg1");
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+ if (!r) {
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+ dev_err(&pdev->dev, "failed to get gpio-reg1 resource\n");
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+ err = -ENODEV;
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+ goto out_free;
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+ }
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+
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+ spin_lock_init(&rdc321x_gpio_dev->lock);
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+ rdc321x_gpio_dev->sb_pdev = pdata->sb_pdev;
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+ rdc321x_gpio_dev->reg1_ctrl_base = r->start;
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+ rdc321x_gpio_dev->reg1_data_base = r->start + 0x4;
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+
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+ r = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpio-reg2");
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+ if (!r) {
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+ dev_err(&pdev->dev, "failed to get gpio-reg2 resource\n");
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+ err = -ENODEV;
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+ goto out_free;
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+ }
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+
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+ rdc321x_gpio_dev->reg2_ctrl_base = r->start;
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+ rdc321x_gpio_dev->reg2_data_base = r->start + 0x4;
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+
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+ rdc321x_gpio_dev->chip.label = "rdc321x-gpio";
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+ rdc321x_gpio_dev->chip.direction_input = rdc_gpio_direction_input;
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+ rdc321x_gpio_dev->chip.direction_output = rdc_gpio_config;
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+ rdc321x_gpio_dev->chip.get = rdc_gpio_get_value;
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+ rdc321x_gpio_dev->chip.set = rdc_gpio_set_value;
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+ rdc321x_gpio_dev->chip.base = 0;
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+ rdc321x_gpio_dev->chip.ngpio = pdata->max_gpios;
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+
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+ platform_set_drvdata(pdev, rdc321x_gpio_dev);
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+
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+ /* This might not be, what others (BIOS, bootloader, etc.)
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+ wrote to these registers before, but it's a good guess. Still
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+ better than just using 0xffffffff. */
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+ err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
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+ rdc321x_gpio_dev->reg1_data_base,
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+ &rdc321x_gpio_dev->data_reg[0]);
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+ if (err)
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+ goto out_drvdata;
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+
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+ err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
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+ rdc321x_gpio_dev->reg2_data_base,
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+ &rdc321x_gpio_dev->data_reg[1]);
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+ if (err)
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+ goto out_drvdata;
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+
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+ dev_info(&pdev->dev, "registering %d GPIOs\n",
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+ rdc321x_gpio_dev->chip.ngpio);
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+ return gpiochip_add(&rdc321x_gpio_dev->chip);
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+
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+out_drvdata:
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+ platform_set_drvdata(pdev, NULL);
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+out_free:
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+ kfree(rdc321x_gpio_dev);
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+ return err;
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+}
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+
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+static int __devexit rdc321x_gpio_remove(struct platform_device *pdev)
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+{
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+ int ret;
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+ struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev);
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+
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+ ret = gpiochip_remove(&rdc321x_gpio_dev->chip);
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+ if (ret)
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+ dev_err(&pdev->dev, "failed to unregister chip\n");
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+
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+ kfree(rdc321x_gpio_dev);
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+ platform_set_drvdata(pdev, NULL);
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+
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+ return ret;
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+}
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+
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+static struct platform_driver rdc321x_gpio_driver = {
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+ .driver.name = "rdc321x-gpio",
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+ .driver.owner = THIS_MODULE,
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+ .probe = rdc321x_gpio_probe,
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+ .remove = __devexit_p(rdc321x_gpio_remove),
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+};
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+
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+static int __init rdc321x_gpio_init(void)
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+{
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+ return platform_driver_register(&rdc321x_gpio_driver);
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+}
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+
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+static void __exit rdc321x_gpio_exit(void)
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+{
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+ platform_driver_unregister(&rdc321x_gpio_driver);
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+}
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+
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+module_init(rdc321x_gpio_init);
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+module_exit(rdc321x_gpio_exit);
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+
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+MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
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+MODULE_DESCRIPTION("RDC321x GPIO driver");
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+MODULE_LICENSE("GPL");
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+MODULE_ALIAS("platform:rdc321x-gpio");
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