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68 lines
2.0 KiB
Diff
68 lines
2.0 KiB
Diff
From d1bcc34ce6cb7601ce27f3090aee0e8a3e8076e3 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
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Date: Sat, 14 Sep 2013 20:54:42 -0300
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Subject: [PATCH] clk: sunxi: protect core clocks from accidental shutdown
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Some important clocks may get disabled as a side effect of another clock
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being disabled, because they have no consumers. This patch implements a
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mechanism so those clocks can be claimed by the driver and therefore
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remain enabled at all times.
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Signed-off-by: Emilio López <emilio@elopez.com.ar>
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---
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drivers/clk/sunxi/clk-sunxi.c | 28 ++++++++++++++++++++++++++++
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1 file changed, 28 insertions(+)
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diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
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index 9bbd035..8fc1375 100644
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--- a/drivers/clk/sunxi/clk-sunxi.c
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+++ b/drivers/clk/sunxi/clk-sunxi.c
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@@ -616,6 +616,31 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat
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}
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}
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+/**
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+ * System clock protection
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+ *
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+ * By enabling these critical clocks, we prevent their accidental gating
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+ * by the framework
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+ */
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+static void __init sunxi_clock_protect(void)
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+{
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+ struct clk *clk;
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+
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+ /* memory bus clock - sun5i+ */
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+ clk = clk_get(NULL, "mbus");
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+ if (!IS_ERR(clk)) {
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+ clk_prepare_enable(clk);
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+ clk_put(clk);
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+ }
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+
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+ /* DDR clock - sun4i+ */
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+ clk = clk_get(NULL, "pll5_ddr");
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+ if (!IS_ERR(clk)) {
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+ clk_prepare_enable(clk);
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+ clk_put(clk);
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+ }
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+}
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+
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static void __init sunxi_init_clocks(struct device_node *np)
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{
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/* Register factor clocks */
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@@ -629,6 +654,9 @@ static void __init sunxi_init_clocks(struct device_node *np)
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/* Register gate clocks */
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of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup);
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+
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+ /* Enable core system clocks */
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+ sunxi_clock_protect();
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}
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CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sunxi_init_clocks);
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CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sunxi_init_clocks);
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--
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1.8.5.1
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