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34 lines
1.3 KiB
Plaintext
34 lines
1.3 KiB
Plaintext
From b4a544e415e9be33b37d9bfa9d9f9f4d13f553d6 Mon Sep 17 00:00:00 2001
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From: William Zhang <william.zhang@broadcom.com>
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Date: Fri, 8 Jul 2022 11:25:06 -0700
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Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC
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The cpu mask value in interrupt property inherits from bcm4908.dtsi
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which sets to four cpus. Correct the value to two cpus for dual core
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BCM4906 SoC.
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Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P DTS files")
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Signed-off-by: William Zhang <william.zhang@broadcom.com>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi | 8 ++++++++
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1 file changed, 8 insertions(+)
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
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@@ -17,6 +17,14 @@
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
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};
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+ timer {
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+ compatible = "arm,armv8-timer";
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+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
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+ };
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+
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pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
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