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9a038e7fd1
Copy config and patches from kernel 5.10 to kernel 5.15 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
93 lines
2.9 KiB
Diff
93 lines
2.9 KiB
Diff
From 362bb238d8bf1470424214a8a5968d9c6cce68fa Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Thu, 14 Oct 2021 00:39:15 +0200
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Subject: net: dsa: qca8k: add support for pws config reg
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Some qca8327 switch require to force the ignore of power on sel
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strapping. Some switch require to set the led open drain mode in regs
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instead of using strapping. While most of the device implements this
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using the correct way using pin strapping, there are still some broken
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device that require to be set using sw regs.
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Introduce a new binding and support these special configuration.
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As led open drain require to ignore pin strapping to work, the probe
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fails with EINVAL error with incorrect configuration.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/qca8k.c | 39 +++++++++++++++++++++++++++++++++++++++
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drivers/net/dsa/qca8k.h | 6 ++++++
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2 files changed, 45 insertions(+)
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--- a/drivers/net/dsa/qca8k.c
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+++ b/drivers/net/dsa/qca8k.c
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@@ -932,6 +932,41 @@ static int qca8k_find_cpu_port(struct ds
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}
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static int
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+qca8k_setup_of_pws_reg(struct qca8k_priv *priv)
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+{
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+ struct device_node *node = priv->dev->of_node;
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+ u32 val = 0;
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+ int ret;
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+
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+ /* QCA8327 require to set to the correct mode.
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+ * His bigger brother QCA8328 have the 172 pin layout.
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+ * Should be applied by default but we set this just to make sure.
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+ */
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+ if (priv->switch_id == QCA8K_ID_QCA8327) {
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+ ret = qca8k_rmw(priv, QCA8K_REG_PWS, QCA8327_PWS_PACKAGE148_EN,
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+ QCA8327_PWS_PACKAGE148_EN);
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+ if (ret)
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+ return ret;
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+ }
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+
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+ if (of_property_read_bool(node, "qca,ignore-power-on-sel"))
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+ val |= QCA8K_PWS_POWER_ON_SEL;
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+
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+ if (of_property_read_bool(node, "qca,led-open-drain")) {
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+ if (!(val & QCA8K_PWS_POWER_ON_SEL)) {
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+ dev_err(priv->dev, "qca,led-open-drain require qca,ignore-power-on-sel to be set.");
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+ return -EINVAL;
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+ }
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+
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+ val |= QCA8K_PWS_LED_OPEN_EN_CSR;
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+ }
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+
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+ return qca8k_rmw(priv, QCA8K_REG_PWS,
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+ QCA8K_PWS_LED_OPEN_EN_CSR | QCA8K_PWS_POWER_ON_SEL,
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+ val);
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+}
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+
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+static int
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qca8k_parse_port_config(struct qca8k_priv *priv)
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{
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int port, cpu_port_index = 0, ret;
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@@ -1053,6 +1088,10 @@ qca8k_setup(struct dsa_switch *ds)
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if (ret)
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return ret;
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+ ret = qca8k_setup_of_pws_reg(priv);
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+ if (ret)
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+ return ret;
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+
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ret = qca8k_setup_mac_pwr_sel(priv);
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if (ret)
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return ret;
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--- a/drivers/net/dsa/qca8k.h
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+++ b/drivers/net/dsa/qca8k.h
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@@ -46,6 +46,12 @@
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#define QCA8K_MAX_DELAY 3
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#define QCA8K_PORT_PAD_SGMII_EN BIT(7)
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#define QCA8K_REG_PWS 0x010
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+#define QCA8K_PWS_POWER_ON_SEL BIT(31)
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+/* This reg is only valid for QCA832x and toggle the package
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+ * type from 176 pin (by default) to 148 pin used on QCA8327
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+ */
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+#define QCA8327_PWS_PACKAGE148_EN BIT(30)
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+#define QCA8K_PWS_LED_OPEN_EN_CSR BIT(24)
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#define QCA8K_PWS_SERDES_AEN_DIS BIT(7)
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#define QCA8K_REG_MODULE_EN 0x030
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#define QCA8K_MODULE_EN_MIB BIT(0)
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