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https://github.com/openwrt/openwrt.git
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98 lines
3.7 KiB
Diff
98 lines
3.7 KiB
Diff
From 5164a36bb033e805c40da76558ceddc82741989b Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Fri, 9 Aug 2013 20:38:15 +0200
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Subject: [PATCH 27/34] pinctrl/lantiq: add missing gphy led setup
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We found out how to set the gphy led pinmuxing.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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drivers/pinctrl/pinctrl-xway.c | 30 ++++++++++++++++++++++++------
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1 file changed, 24 insertions(+), 6 deletions(-)
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--- a/drivers/pinctrl/pinctrl-xway.c
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+++ b/drivers/pinctrl/pinctrl-xway.c
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@@ -102,6 +102,7 @@ enum xway_mux {
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XWAY_MUX_EPHY,
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XWAY_MUX_DFE,
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XWAY_MUX_SDIO,
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+ XWAY_MUX_GPHY,
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XWAY_MUX_NONE = 0xffff,
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};
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@@ -109,12 +110,12 @@ static const struct ltq_mfp_pin xway_mfp
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/* pin f0 f1 f2 f3 */
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MFP_XWAY(GPIO0, GPIO, EXIN, NONE, TDM),
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MFP_XWAY(GPIO1, GPIO, EXIN, NONE, NONE),
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- MFP_XWAY(GPIO2, GPIO, CGU, EXIN, NONE),
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+ MFP_XWAY(GPIO2, GPIO, CGU, EXIN, GPHY),
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MFP_XWAY(GPIO3, GPIO, CGU, NONE, PCI),
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MFP_XWAY(GPIO4, GPIO, STP, NONE, ASC),
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- MFP_XWAY(GPIO5, GPIO, STP, NONE, NONE),
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+ MFP_XWAY(GPIO5, GPIO, STP, NONE, GPHY),
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MFP_XWAY(GPIO6, GPIO, STP, GPT, ASC),
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- MFP_XWAY(GPIO7, GPIO, CGU, PCI, NONE),
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+ MFP_XWAY(GPIO7, GPIO, CGU, PCI, GPHY),
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MFP_XWAY(GPIO8, GPIO, CGU, NMI, NONE),
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MFP_XWAY(GPIO9, GPIO, ASC, SPI, EXIN),
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MFP_XWAY(GPIO10, GPIO, ASC, SPI, NONE),
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@@ -151,10 +152,10 @@ static const struct ltq_mfp_pin xway_mfp
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MFP_XWAY(GPIO41, GPIO, NONE, NONE, NONE),
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MFP_XWAY(GPIO42, GPIO, MDIO, NONE, NONE),
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MFP_XWAY(GPIO43, GPIO, MDIO, NONE, NONE),
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- MFP_XWAY(GPIO44, GPIO, NONE, NONE, SIN),
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- MFP_XWAY(GPIO45, GPIO, NONE, NONE, SIN),
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+ MFP_XWAY(GPIO44, GPIO, NONE, GPHY, SIN),
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+ MFP_XWAY(GPIO45, GPIO, NONE, GPHY, SIN),
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MFP_XWAY(GPIO46, GPIO, NONE, NONE, EXIN),
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- MFP_XWAY(GPIO47, GPIO, NONE, NONE, SIN),
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+ MFP_XWAY(GPIO47, GPIO, NONE, GPHY, SIN),
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MFP_XWAY(GPIO48, GPIO, EBU, NONE, NONE),
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MFP_XWAY(GPIO49, GPIO, EBU, NONE, NONE),
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MFP_XWAY(GPIO50, GPIO, NONE, NONE, NONE),
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@@ -208,6 +209,13 @@ static const unsigned pins_stp[] = {GPIO
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static const unsigned pins_nmi[] = {GPIO8};
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static const unsigned pins_mdio[] = {GPIO42, GPIO43};
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+static const unsigned pins_gphy0_led0[] = {GPIO5};
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+static const unsigned pins_gphy0_led1[] = {GPIO7};
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+static const unsigned pins_gphy0_led2[] = {GPIO2};
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+static const unsigned pins_gphy1_led0[] = {GPIO44};
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+static const unsigned pins_gphy1_led1[] = {GPIO45};
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+static const unsigned pins_gphy1_led2[] = {GPIO47};
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+
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static const unsigned pins_ebu_a24[] = {GPIO13};
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static const unsigned pins_ebu_clk[] = {GPIO21};
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static const unsigned pins_ebu_cs1[] = {GPIO23};
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@@ -322,6 +330,12 @@ static const struct ltq_pin_group xway_g
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GRP_MUX("gnt4", PCI, pins_pci_gnt4),
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GRP_MUX("req4", PCI, pins_pci_gnt4),
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GRP_MUX("mdio", MDIO, pins_mdio),
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+ GRP_MUX("gphy0 led0", GPHY, pins_gphy0_led0),
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+ GRP_MUX("gphy0 led1", GPHY, pins_gphy0_led1),
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+ GRP_MUX("gphy0 lde2", GPHY, pins_gphy0_led2),
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+ GRP_MUX("gphy1 led0", GPHY, pins_gphy1_led0),
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+ GRP_MUX("gphy1 led1", GPHY, pins_gphy1_led1),
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+ GRP_MUX("gphy1 lde2", GPHY, pins_gphy1_led2),
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};
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static const struct ltq_pin_group ase_grps[] = {
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@@ -365,6 +379,9 @@ static const char * const xway_nmi_grps[
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/* ar9/vr9/gr9 */
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static const char * const xrx_mdio_grps[] = {"mdio"};
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+static const char * const xrx_gphy_grps[] = {"gphy0 led0", "gphy0 led1",
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+ "gphy0 led2", "gphy1 led0",
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+ "gphy1 led1", "gphy1 led2"};
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static const char * const xrx_ebu_grps[] = {"ebu a23", "ebu a24",
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"ebu a25", "ebu cs1",
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"ebu wait", "ebu clk",
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@@ -414,6 +431,7 @@ static const struct ltq_pmx_func xrx_fun
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{"pci", ARRAY_AND_SIZE(xrx_pci_grps)},
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{"ebu", ARRAY_AND_SIZE(xrx_ebu_grps)},
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{"mdio", ARRAY_AND_SIZE(xrx_mdio_grps)},
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+ {"gphy", ARRAY_AND_SIZE(xrx_gphy_grps)},
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};
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static const struct ltq_pmx_func ase_funcs[] = {
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