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https://github.com/openwrt/openwrt.git
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61ef5940f2
ADB P.DG A4101N A-000-1A1-AE has a similar PCB as the OpenWrt's ADB P.DG A4001N1 with LEDs connected to different GPIO PINs in active low configuration. Hardware: * Board ID: 96328avngv * SoC: Broadcom BCM6328 (rev b0) @ 320MHz, CPU BMIPS4350 * RAM DDR2: 64 Mbyte - Winbond W9751G6KB-25 * Serial flash: 16 Mbyte - Winbond 25Q128BVFG * Ethernet: 4x Ethernet 10/100 baseT * Wifi 2.4GHz: Broadcom Corporation BCM43225 Wireless Network Adapter (rev 23) * LEDs: 1x Power, 1x DSL, 1x Internet, 4x ETH, 1x USB, 1x WLAN, 1x WPS, 1x TEL * Buttons: 1x Reset, 1x WPS, 1x unnamed * UART: 1x TTL 115200n8, VCC RX TX GND, on J502 connector Installation via CFE: * Stock CFE has to be overwritten with a generic 6328 one that can upload .bin images with no signature check (cfe6328_configured.bin) * Connect a serial port to the board * Stop the cfe boot process after power on by pressing enter * Set static IP 192.168.2.10 and subnet mask 255.255.255.0 * Navigate to http://192.168.2.50/ * Upload the OpenWrt image file A4101N GPIO LAYOUT: Power always on DSL GPIO483(03) Internet GPIO491(11) ETH1 GPIO505(25) ETH2 GPIO506(26) ETH3 GPIO507(27) ETH4 GPIO508(28) USB GPIO490(10) WLAN controlled by BCM43225 WPS GPIO489(09) TEL GPIO511(31) Key RESET GPIO503(23) Key WPS GPIO504(24) Key unnamed GPIO492(12) Signed-off-by: Daniele Castro <danielecastro@hotmail.it> [Amend commit description, DTS improvements, refresh patches] Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
50 lines
1.6 KiB
Diff
50 lines
1.6 KiB
Diff
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -3112,6 +3112,22 @@ void __init board_bcm963xx_init(void)
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val &= MPI_CSBASE_BASE_MASK;
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}
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boot_addr = (u8 *)KSEG1ADDR(val);
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+ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr);
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+
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+ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
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+ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
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+ /* Loading firmware from the CFE Prompt always loads to Bank 0 */
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+ /* Do an early check of CFE and then select bank 0 */
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+
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+ if (boot_addr == (u8 *)0xbf800000) {
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+ u8 *tmp_boot_addr = (u8*)0xbfc00000;
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+
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+ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
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+ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
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+ pr_info("V2500V: nvram bank 0\n");
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+ boot_addr = tmp_boot_addr;
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+ }
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+ }
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/* dump cfe version */
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cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
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--- a/arch/mips/bcm63xx/dev-flash.c
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+++ b/arch/mips/bcm63xx/dev-flash.c
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@@ -21,6 +21,7 @@
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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+#include <bcm63xx_board.h>
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#include <bcm63xx_cpu.h>
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#include <bcm63xx_dev_flash.h>
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#include <bcm63xx_regs.h>
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@@ -256,6 +257,13 @@ int __init bcm63xx_flash_register(void)
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val = bcm_mpi_readl(MPI_CSBASE_REG(0));
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val &= MPI_CSBASE_BASE_MASK;
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+ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
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+ /* Loading from CFE always uses Bank 0 */
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+ if (!strcmp(board_get_name(), "V2500V_BB")) {
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+ pr_info("V2500V: Start in Bank 0\n");
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+ val = val + 0x400000; // Select Bank 0 start address
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+ }
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+
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mtd_resources[0].start = val;
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mtd_resources[0].end = 0x1FFFFFFF;
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}
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