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640a36aafc
This applies minor style improvements and removes commented pll clock adjustments from ubnt_xm DTSI. The latter were introduced (already commented out) when adding ath79 target and have never been touched since then. For Unifi (BZ board), similar clock adjustments are employed and used. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
100 lines
1.4 KiB
Plaintext
100 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "ar7241.dtsi"
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/ {
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compatible = "ubnt,xm", "qca,ar7241";
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model = "Ubiquiti Networks XM (rev 1.0) board";
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keys {
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compatible = "gpio-keys";
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reset {
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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};
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&uart {
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status = "okay";
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x000000 0x040000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x040000 0x010000>;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x050000 0x750000>;
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};
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partition@7a0000 {
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label = "board_config";
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reg = <0x7a0000 0x010000>;
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read-only;
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};
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partition@7b0000 {
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label = "cfg";
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reg = <0x7b0000 0x040000>;
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read-only;
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};
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art: partition@7f0000 {
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label = "art";
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reg = <0x7f0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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wifi: wifi@0,0 {
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reg = <0x0000 0 0 0 0>;
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qca,no-eeprom;
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};
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};
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ð0 {
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status = "okay";
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mtd-mac-address = <&art 0x0>;
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};
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ð1 {
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status = "okay";
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mtd-mac-address = <&art 0x6>;
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};
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