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9470160c35
Also known as the "Xiaomi Router AX3200" in western markets,
but only the AX6S is widely installation-capable at this time.
SoC: MediaTek MT7622B
RAM: DDR3 256 MiB (ESMT M15T2G16128A)
Flash: SPI-NAND 128 MiB (ESMT F50L1G41LB or Gigadevice GD5F1GQ5xExxG)
WLAN: 2.4/5 GHz 4T4R
2.4 GHz: MediaTek MT7622B
5 GHz: MediaTek MT7915E
Ethernet: 4x 10/100/1000 Mbps
Switch: MediaTek MT7531B
LEDs/Keys: 2/2 (Internet + System LED, Mesh button + Reset pin)
UART: Marked J1 on board VCC RX GND TX, beginning from "1". 3.3v, 115200n8
Power: 12 VDC, 1.5 A
Notes:
U-Boot passes through the ethaddr from uboot-env partition,
but also has been known to reset it to a generic mac address
hardcoded in the bootloader.
However, bdata is also populated with the ethernet mac addresses,
but is also typically never written to. Thus this is used instead.
Installation:
1. Flash stock Xiaomi "closed beta" image labelled
'miwifi_rb03_firmware_stable_1.2.7_closedbeta.bin'.
(MD5: 5eedf1632ac97bb5a6bb072c08603ed7)
2. Calculate telnet password from serial number and login
3. Execute commands to prepare device
nvram set ssh_en=1
nvram set uart_en=1
nvram set boot_wait=on
nvram set flag_boot_success=1
nvram set flag_try_sys1_failed=0
nvram set flag_try_sys2_failed=0
nvram commit
4. Download and flash image
On computer:
python -m http.server
On router:
cd /tmp
wget http://<IP>:8000/factory.bin
mtd -r write factory.bin firmware
Device should reboot at this point.
Reverting to stock:
Stock Xiaomi recovery tftp that accepts their signed images,
with default ips of 192.168.31.1 + 192.168.31.100.
Stock image should be renamed to tftp server ip in hex (Eg. C0A81F64.img)
Triggered by holding reset pin on powerup.
A simple implementation of this would be via dnsmasq's
dhcp-boot option or using the vendor's (Windows only)
recovery tool available on their website.
Signed-off-by: Richard Huynh <voxlympha@gmail.com>
(cherry picked from commit 9f9477b275
)
356 lines
5.6 KiB
Plaintext
356 lines
5.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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/ {
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model = "Xiaomi Redmi Router AX6S";
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compatible = "xiaomi,redmi-router-ax6s", "mediatek,mt7622";
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aliases {
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serial0 = &uart0;
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led-boot = &led_power_amber;
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led-failsafe = &led_power_amber;
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led-running = &led_power_blue;
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led-upgrade = &led_power_blue;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
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};
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memory {
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reg = <0 0x40000000 0 0x8000000>;
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};
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leds {
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compatible = "gpio-leds";
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led_power_blue: power_blue {
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label = "blue:power";
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gpios = <&pio 18 GPIO_ACTIVE_LOW>;
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};
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led_power_amber: power_amber {
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label = "amber:power";
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gpios = <&pio 17 GPIO_ACTIVE_LOW>;
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};
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led_net_blue: net_blue {
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label = "blue:net";
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gpios = <&pio 01 GPIO_ACTIVE_LOW>;
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};
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led_net_amber: net_amber {
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label = "amber:net";
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gpios = <&pio 16 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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mesh {
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label = "mesh";
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gpios = <&pio 102 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_9>;
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linux,input-type = <EV_SW>;
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};
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};
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};
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&cpu0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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&cpu1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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&pio {
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eth_pins: eth-pins {
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mux {
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function = "eth";
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groups = "mdc_mdio", "rgmii_via_gmac2";
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};
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};
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pcie0_pins: pcie0-pins {
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mux {
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function = "pcie";
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groups = "pcie0_pad_perst",
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"pcie0_1_waken",
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"pcie0_1_clkreq";
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};
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};
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pmic_bus_pins: pmic-bus-pins {
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mux {
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function = "pmic";
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groups = "pmic_bus";
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};
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};
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pwm7_pins: pwm1-2-pins {
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mux {
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function = "pwm";
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groups = "pwm_ch7_2";
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};
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};
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/* Serial NAND is shared pin with SPI-NOR */
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serial_nand_pins: serial-nand-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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};
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uart0_pins: uart0-pins {
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mux {
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function = "uart";
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groups = "uart0_0_tx_rx" ;
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};
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};
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watchdog_pins: watchdog-pins {
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mux {
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function = "watchdog";
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groups = "watchdog";
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};
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};
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};
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ð {
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pinctrl-names = "default";
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pinctrl-0 = <ð_pins>;
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-connection-type = "2500base-x";
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(-1)>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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compatible = "mediatek,mt7531";
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
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reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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wan: port@1 {
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reg = <1>;
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label = "wan";
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};
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port@2 {
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reg = <2>;
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label = "lan1";
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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};
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port@4 {
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reg = <4>;
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label = "lan3";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&snand {
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pinctrl-names = "default";
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pinctrl-0 = <&serial_nand_pins>;
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status = "okay";
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mediatek,bmt-v2;
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mediatek,bmt-table-size = <0x1000>;
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mediatek,bmt-remap-range = <0x0 0x6c0000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Preloader";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "ATF";
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reg = <0x80000 0x40000>;
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read-only;
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};
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partition@c0000 {
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label = "u-boot";
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reg = <0xc0000 0x80000>;
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read-only;
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};
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partition@140000 {
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label = "u-boot-env";
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reg = <0x140000 0x40000>;
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};
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partition@180000 {
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label = "bdata";
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reg = <0x180000 0x40000>;
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};
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factory: partition@1c0000 {
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label = "factory";
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reg = <0x1c0000 0x80000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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partition@240000 {
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label = "crash";
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reg = <0x240000 0x40000>;
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read-only;
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};
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partition@280000 {
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label = "crash_log";
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reg = <0x280000 0x40000>;
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read-only;
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};
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/* Shrunk and renamed from "firmware"
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* as to not break luci size checks
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*/
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partition@2c0000 {
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label = "kernel";
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compatible = "denx,fit";
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reg = <0x2c0000 0x400000>;
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};
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/* ubi partition is the result of squashing
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* consecutive stock partitions:
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* - firmware (partially)
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* - firmware1
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* - overlay
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* - obr
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*/
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partition@6c0000 {
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label = "ubi";
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reg = <0x6C0000 0x6f00000>;
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};
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};
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};
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_pins>;
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status = "okay";
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};
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&slot0 {
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status = "okay";
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x5000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&pwm {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm7_pins>;
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status = "okay";
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};
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&pwrap {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_bus_pins>;
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status = "okay";
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};
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&rtc {
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status = "disabled";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&watchdog {
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pinctrl-names = "default";
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pinctrl-0 = <&watchdog_pins>;
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status = "okay";
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};
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&wmac {
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status = "okay";
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mediatek,mtd-eeprom = <&factory 0x0>;
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};
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