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c2c741ccce
Initial backport of at803x PHY driver cleanup. This is in preparation for split and addition of new PHY Family based on at803x needed for ipq807x and other IPQ Series SoC. Other affected patch are automatically refreshed with make target/linux/refresh Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
117 lines
3.5 KiB
Diff
117 lines
3.5 KiB
Diff
From 8e732f1c6f2dc5e18f766d0f1b11df9db2dd044a Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Thu, 14 Dec 2023 01:44:31 +0100
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Subject: [PATCH 1/2] net: phy: at803x: move specific qca808x config_aneg to
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dedicated function
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Move specific qca808x config_aneg to dedicated function to permit easier
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split of qca808x portion from at803x driver.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/at803x.c | 66 ++++++++++++++++++++++++----------------
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1 file changed, 40 insertions(+), 26 deletions(-)
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--- a/drivers/net/phy/at803x.c
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+++ b/drivers/net/phy/at803x.c
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@@ -1045,9 +1045,8 @@ static int at803x_config_mdix(struct phy
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FIELD_PREP(AT803X_SFC_MDI_CROSSOVER_MODE_M, val));
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}
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-static int at803x_config_aneg(struct phy_device *phydev)
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+static int at803x_prepare_config_aneg(struct phy_device *phydev)
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{
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- struct at803x_priv *priv = phydev->priv;
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int ret;
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ret = at803x_config_mdix(phydev, phydev->mdix_ctrl);
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@@ -1064,33 +1063,22 @@ static int at803x_config_aneg(struct phy
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return ret;
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}
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- if (priv->is_1000basex)
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- return genphy_c37_config_aneg(phydev);
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-
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- /* Do not restart auto-negotiation by setting ret to 0 defautly,
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- * when calling __genphy_config_aneg later.
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- */
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- ret = 0;
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-
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- if (phydev->drv->phy_id == QCA8081_PHY_ID) {
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- int phy_ctrl = 0;
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+ return 0;
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+}
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- /* The reg MII_BMCR also needs to be configured for force mode, the
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- * genphy_config_aneg is also needed.
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- */
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- if (phydev->autoneg == AUTONEG_DISABLE)
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- genphy_c45_pma_setup_forced(phydev);
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+static int at803x_config_aneg(struct phy_device *phydev)
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+{
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+ struct at803x_priv *priv = phydev->priv;
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+ int ret;
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- if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising))
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- phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
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+ ret = at803x_prepare_config_aneg(phydev);
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+ if (ret)
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+ return ret;
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- ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
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- MDIO_AN_10GBT_CTRL_ADV2_5G, phy_ctrl);
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- if (ret < 0)
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- return ret;
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- }
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+ if (priv->is_1000basex)
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+ return genphy_c37_config_aneg(phydev);
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- return __genphy_config_aneg(phydev, ret);
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+ return genphy_config_aneg(phydev);
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}
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static int at803x_get_downshift(struct phy_device *phydev, u8 *d)
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@@ -2118,6 +2106,32 @@ static int qca808x_get_features(struct p
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return 0;
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}
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+static int qca808x_config_aneg(struct phy_device *phydev)
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+{
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+ int phy_ctrl = 0;
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+ int ret;
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+
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+ ret = at803x_prepare_config_aneg(phydev);
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+ if (ret)
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+ return ret;
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+
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+ /* The reg MII_BMCR also needs to be configured for force mode, the
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+ * genphy_config_aneg is also needed.
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+ */
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+ if (phydev->autoneg == AUTONEG_DISABLE)
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+ genphy_c45_pma_setup_forced(phydev);
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+
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+ if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising))
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+ phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
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+
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+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
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+ MDIO_AN_10GBT_CTRL_ADV2_5G, phy_ctrl);
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+ if (ret < 0)
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+ return ret;
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+
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+ return __genphy_config_aneg(phydev, ret);
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+}
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+
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static void qca808x_link_change_notify(struct phy_device *phydev)
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{
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/* Assert interface sgmii fifo on link down, deassert it on link up,
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@@ -2295,7 +2309,7 @@ static struct phy_driver at803x_driver[]
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.set_wol = at803x_set_wol,
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.get_wol = at803x_get_wol,
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.get_features = qca808x_get_features,
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- .config_aneg = at803x_config_aneg,
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+ .config_aneg = qca808x_config_aneg,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.read_status = qca808x_read_status,
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