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https://github.com/openwrt/openwrt.git
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74d00a8c38
* properly format/comment all patches * merge debloat patches * merge Kconfig patches * merge swconfig patches * merge hotplug patches * drop 200-fix_localversion.patch - upstream * drop 222-arm_zimage_none.patch - unused * drop 252-mv_cesa_depends.patch - no longer required * drop 410-mtd-move-forward-declaration-of-struct-mtd_info.patch - unused * drop 661-fq_codel_keep_dropped_stats.patch - outdated * drop 702-phy_add_aneg_done_function.patch - upstream * drop 840-rtc7301.patch - unused * drop 841-rtc_pt7c4338.patch - upstream * drop 921-use_preinit_as_init.patch - unused * drop spio-gpio-old and gpio-mmc - unused Signed-off-by: John Crispin <john@phrozen.org>
52 lines
1.9 KiB
Diff
52 lines
1.9 KiB
Diff
--- a/drivers/pci/Kconfig
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+++ b/drivers/pci/Kconfig
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@@ -68,6 +68,12 @@ config XEN_PCIDEV_FRONTEND
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The PCI device frontend driver allows the kernel to import arbitrary
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PCI devices from a PCI backend to support PCI driver domains.
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+config PCI_DISABLE_COMMON_QUIRKS
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+ bool "PCI disable common quirks"
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+ depends on PCI
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+ help
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+ If you don't know what to do here, say N.
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+
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config HT_IRQ
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bool "Interrupts on hypertransport devices"
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default y
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -41,6 +41,7 @@ static void quirk_mmio_always_on(struct
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DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
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+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
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/* The Mellanox Tavor device gives false positive parity errors
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* Mark this device with a broken_parity_status, to allow
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* PCI scanning code to "skip" this now blacklisted device.
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@@ -2975,6 +2976,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
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+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
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/*
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* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. To
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@@ -3031,6 +3033,8 @@ static void fixup_debug_report(struct pc
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}
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}
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+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
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+
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/*
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* Some BIOS implementations leave the Intel GPU interrupts enabled,
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* even though no one is handling them (f.e. i915 driver is never loaded).
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@@ -3065,6 +3069,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
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+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
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+
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/*
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* PCI devices which are on Intel chips can skip the 10ms delay
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* before entering D3 mode.
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