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047695a029
This reverts commit 51397d7d95.
There are some unresolved random crashes on WRT1900AC v1 that still need
to be sorted out
Signed-off-by: Felix Fietkau <nbd@nbd.name>
95 lines
2.8 KiB
Diff
95 lines
2.8 KiB
Diff
From: Marcin Wojtas <mw@semihalf.com>
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Date: Mon, 14 Mar 2016 09:39:02 +0100
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Subject: [PATCH] bus: mvebu-mbus: provide api for obtaining IO and DRAM window
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information
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This commit enables finding appropriate mbus window and obtaining its
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target id and attribute for given physical address in two separate
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routines, both for IO and DRAM windows. This functionality
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is needed for Armada XP/38x Network Controller's Buffer Manager and
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PnC configuration.
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[gregory.clement@free-electrons.com: Fix size test for
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mvebu_mbus_get_dram_win_info]
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Signed-off-by: Marcin Wojtas <mw@semihalf.com>
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[DRAM window information reference in LKv3.10]
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Signed-off-by: Evan Wang <xswang@marvell.com>
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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--- a/drivers/bus/mvebu-mbus.c
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+++ b/drivers/bus/mvebu-mbus.c
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@@ -948,6 +948,58 @@ void mvebu_mbus_get_pcie_io_aperture(str
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*res = mbus_state.pcie_io_aperture;
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}
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+int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr)
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+{
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+ const struct mbus_dram_target_info *dram;
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+ int i;
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+
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+ /* Get dram info */
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+ dram = mv_mbus_dram_info();
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+ if (!dram) {
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+ pr_err("missing DRAM information\n");
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+ return -ENODEV;
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+ }
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+
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+ /* Try to find matching DRAM window for phyaddr */
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+ for (i = 0; i < dram->num_cs; i++) {
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+ const struct mbus_dram_window *cs = dram->cs + i;
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+
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+ if (cs->base <= phyaddr &&
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+ phyaddr <= (cs->base + cs->size - 1)) {
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+ *target = dram->mbus_dram_target_id;
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+ *attr = cs->mbus_attr;
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+ return 0;
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+ }
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+ }
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+
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+ pr_err("invalid dram address 0x%x\n", phyaddr);
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+ return -EINVAL;
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+}
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+EXPORT_SYMBOL_GPL(mvebu_mbus_get_dram_win_info);
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+
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+int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
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+ u8 *attr)
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+{
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+ int win;
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+
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+ for (win = 0; win < mbus_state.soc->num_wins; win++) {
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+ u64 wbase;
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+ int enabled;
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+
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+ mvebu_mbus_read_window(&mbus_state, win, &enabled, &wbase,
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+ size, target, attr, NULL);
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+
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+ if (!enabled)
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+ continue;
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+
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+ if (wbase <= phyaddr && phyaddr <= wbase + *size)
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+ return win;
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+ }
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+
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+ return -EINVAL;
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+}
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+EXPORT_SYMBOL_GPL(mvebu_mbus_get_io_win_info);
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+
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static __init int mvebu_mbus_debugfs_init(void)
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{
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struct mvebu_mbus_state *s = &mbus_state;
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--- a/include/linux/mbus.h
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+++ b/include/linux/mbus.h
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@@ -69,6 +69,9 @@ static inline const struct mbus_dram_tar
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int mvebu_mbus_save_cpu_target(u32 *store_addr);
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void mvebu_mbus_get_pcie_mem_aperture(struct resource *res);
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void mvebu_mbus_get_pcie_io_aperture(struct resource *res);
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+int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr);
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+int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
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+ u8 *attr);
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int mvebu_mbus_add_window_remap_by_id(unsigned int target,
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unsigned int attribute,
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phys_addr_t base, size_t size,
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