openwrt/target/linux/ath79/dts/qca9558_tplink_re350k-v1.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

177 lines
2.9 KiB
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "TP-Link RE350K v1";
compatible = "tplink,re350k-v1", "qca,qca9558";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
mdio-gpio0 = &mdio2;
};
keys {
compatible = "gpio-keys";
app-config {
label = "app-config";
linux,code = <BTN_0>;
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
led {
label = "led";
linux,code = <BTN_1>;
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "green:power";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g_green {
label = "green:wlan2g";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wlan2g_red {
label = "red:wlan2g";
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
wlan5g_green {
label = "green:wlan5g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wlan5g_red {
label = "red:wlan5g";
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
};
};
mdio2: mdio {
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>,
<&gpio 18 GPIO_ACTIVE_HIGH>;
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii-rxid";
eee-broken-100tx;
eee-broken-1000t;
};
};
};
&eth0 {
status = "okay";
phy-handle = <&phy4>;
pll-data = <0x9e000000 0x80000101 0x80001313>;
mtd-mac-address = <&info 0x8>;
gmac-config {
device = <&gmac>;
rxdv-delay = <2>;
rxd-delay = <2>;
txen-delay = <0>;
txd-delay = <0>;
rgmii-enabled = <1>;
};
};
&pcie0 {
status = "okay";
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0xd70000>;
};
partition@d90000 {
label = "partition-table";
reg = <0xd90000 0x010000>;
read-only;
};
info: partition@da0000 {
label = "info";
reg = <0xda0000 0x020000>;
read-only;
};
partition@dc0000 {
label = "config";
reg = <0xdc0000 0x230000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&info 0x8>;
};