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06bb4a5018
Define nvmem-cells and convert mtd-mac-address to nvmem implementation. The conversion is done with an automated script. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
187 lines
3.1 KiB
Plaintext
187 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
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* All rights reserved.
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*/
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "sanlinking,d240", "ralink,mt7620a-soc";
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model = "Sanlinking Technologies D240";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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power_mpcie2 {
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gpio-export,name = "power_mpcie2";
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gpio-export,output = <1>;
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gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
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};
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power_mpcie1 {
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gpio-export,name = "power_mpcie1";
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gpio-export,output = <1>;
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gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "blue:power";
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gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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};
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usb {
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label = "blue:usb";
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gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
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trigger-sources = <&ohci_port1>, <&ehci_port1>;
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linux,default-trigger = "usbport";
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};
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air {
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label = "blue:wifi";
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xfb0000>;
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};
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};
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};
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};
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&sdhci {
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status = "okay";
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/* the pins function is already set during pinmux driver load */
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/delete-property/ pinctrl-0;
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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ðernet {
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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mediatek,portmap = "llllw";
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0x0>;
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};
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&state_default {
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default {
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groups = "i2c", "uartf", "wled", "spi refclk", "pa";
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function = "gpio";
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};
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/*
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* The sd function of the nd_sd group configures two of the
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* groups pins as gpios. The pins are used as PCIe reset/power.
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* Due to the driver load order, the pins are configured way to
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* late if triggered by the sd-card driver.
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* To not introduce another kind of driver load order
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* dependency and configure the pins as early as possible,
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* means during pinmux driver load.
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*/
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gpio_sd {
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groups = "nd_sd";
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function = "sd";
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};
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};
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&pcie {
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status = "okay";
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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