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New revision of Methode eDPU boards uses Marvell 88E6361 switch, so lets backport it from kernel 6.5. Since 5.15 doesnt have phylink_get_caps I had to modify the backport to use the old mv88e6393x_phylink_validate instead. I had to fixup one more instance of port_max_speed_mode as well that is not present in 6.5. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
114 lines
4.2 KiB
Diff
114 lines
4.2 KiB
Diff
From 68690045f8e220826517c0d6f9388ffc1faa57ea Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
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Date: Mon, 29 May 2023 10:02:45 +0200
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Subject: [PATCH 897/898] net: dsa: mv88e6xxx: pass mv88e6xxx_chip structure to
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port_max_speed_mode
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Some switches families have minor differences on supported link speed for
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ports. Instead of redefining a new port_max_speed_mode for each different
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configuration, allow to pass mv88e6xxx_chip structure to allow
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differentiating those chips by known chip id
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Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Update one more instance of port_max_speed_mode that 5.15 has.
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[Robert Marko]
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
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drivers/net/dsa/mv88e6xxx/chip.h | 3 ++-
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drivers/net/dsa/mv88e6xxx/port.c | 12 ++++++++----
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drivers/net/dsa/mv88e6xxx/port.h | 12 ++++++++----
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4 files changed, 19 insertions(+), 10 deletions(-)
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--- a/drivers/net/dsa/mv88e6xxx/chip.c
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+++ b/drivers/net/dsa/mv88e6xxx/chip.c
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@@ -443,7 +443,7 @@ static int mv88e6xxx_port_setup_mac(stru
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}
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if (speed == SPEED_MAX && chip->info->ops->port_max_speed_mode)
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- mode = chip->info->ops->port_max_speed_mode(port);
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+ mode = chip->info->ops->port_max_speed_mode(chip, port);
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if (chip->info->ops->port_set_pause) {
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err = chip->info->ops->port_set_pause(chip, port, pause);
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--- a/drivers/net/dsa/mv88e6xxx/chip.h
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+++ b/drivers/net/dsa/mv88e6xxx/chip.h
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@@ -485,7 +485,8 @@ struct mv88e6xxx_ops {
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int speed, int duplex);
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/* What interface mode should be used for maximum speed? */
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- phy_interface_t (*port_max_speed_mode)(int port);
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+ phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
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+ int port);
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int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
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--- a/drivers/net/dsa/mv88e6xxx/port.c
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+++ b/drivers/net/dsa/mv88e6xxx/port.c
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@@ -357,7 +357,8 @@ int mv88e6341_port_set_speed_duplex(stru
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duplex);
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}
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-phy_interface_t mv88e6341_port_max_speed_mode(int port)
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+phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port)
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{
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if (port == 5)
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return PHY_INTERFACE_MODE_2500BASEX;
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@@ -402,7 +403,8 @@ int mv88e6390_port_set_speed_duplex(stru
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duplex);
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}
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-phy_interface_t mv88e6390_port_max_speed_mode(int port)
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+phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port)
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{
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if (port == 9 || port == 10)
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return PHY_INTERFACE_MODE_2500BASEX;
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@@ -427,7 +429,8 @@ int mv88e6390x_port_set_speed_duplex(str
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duplex);
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}
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-phy_interface_t mv88e6390x_port_max_speed_mode(int port)
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+phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port)
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{
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if (port == 9 || port == 10)
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return PHY_INTERFACE_MODE_XAUI;
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@@ -527,7 +530,8 @@ int mv88e6393x_port_set_speed_duplex(str
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return 0;
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}
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-phy_interface_t mv88e6393x_port_max_speed_mode(int port)
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+phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port)
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{
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if (port == 0 || port == 9 || port == 10)
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return PHY_INTERFACE_MODE_10GBASER;
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--- a/drivers/net/dsa/mv88e6xxx/port.h
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+++ b/drivers/net/dsa/mv88e6xxx/port.h
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@@ -350,10 +350,14 @@ int mv88e6390x_port_set_speed_duplex(str
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int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
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int speed, int duplex);
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-phy_interface_t mv88e6341_port_max_speed_mode(int port);
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-phy_interface_t mv88e6390_port_max_speed_mode(int port);
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-phy_interface_t mv88e6390x_port_max_speed_mode(int port);
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-phy_interface_t mv88e6393x_port_max_speed_mode(int port);
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+phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port);
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+phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port);
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+phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port);
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+phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
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+ int port);
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int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);
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