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8c6f00ef4f
Refresh patches.
Remove upstreamed patches:
- backport/096-mips-math-emu-Write-protect-delay-slot-emulation-pages.patch
- pending/510-f2fs-fix-sanity_check_raw_super-on-big-endian-machines.patch
- brcm2708/950-0415-qmi_wwan-apply-SET_DTR-quirk-to-the-SIMCOM-shared-de.patch
Compile-tested: ar71xx, ath79, brcm2708/bcm27{08,10}, octeon, x86/64
Runtime-tested: ar71xx, ath79, brcm2708/bcm27{08,10}, octeon, x86/64
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
87 lines
2.8 KiB
Diff
87 lines
2.8 KiB
Diff
From 954b81b93de3cc6baa9e2ebdd4e8dc7b63dab71a Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.org>
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Date: Thu, 16 Nov 2017 14:22:30 +0000
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Subject: [PATCH 181/454] drm/vc4: Use .pixel_order instead of custom
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.flip_cbcr
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The hardware has enums for altering the Cr and Cb order,
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so use this instead of having a flag which swaps the
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order the pointers are presented to the hardware
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(that only worked for 3 plane formats anyway).
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Explicitly sets .pixel_order in each case, rather than
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relying on then default XYCBCR order being a value 0.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Link: https://patchwork.freedesktop.org/patch/msgid/563872b69c1e5df142cb15ebfca7f20056b8a64c.1510841336.git.dave.stevenson@raspberrypi.org
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(cherry picked from commit 090cb0c690183be849e2bfa0427220f1e435fa30)
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---
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drivers/gpu/drm/vc4/vc4_plane.c | 20 ++++++++------------
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1 file changed, 8 insertions(+), 12 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -86,7 +86,6 @@ static const struct hvs_format {
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u32 hvs; /* HVS_FORMAT_* */
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u32 pixel_order;
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bool has_alpha;
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- bool flip_cbcr;
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} hvs_formats[] = {
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{
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.drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
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@@ -131,28 +130,32 @@ static const struct hvs_format {
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{
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.drm = DRM_FORMAT_YUV422,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
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+ .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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},
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{
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.drm = DRM_FORMAT_YVU422,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
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- .flip_cbcr = true,
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+ .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
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},
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{
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.drm = DRM_FORMAT_YUV420,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
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+ .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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},
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{
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.drm = DRM_FORMAT_YVU420,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
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- .flip_cbcr = true,
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+ .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
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},
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{
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.drm = DRM_FORMAT_NV12,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
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+ .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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},
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{
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.drm = DRM_FORMAT_NV16,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
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+ .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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},
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};
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@@ -625,15 +628,8 @@ static int vc4_plane_mode_set(struct drm
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* The pointers may be any byte address.
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*/
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vc4_state->ptr0_offset = vc4_state->dlist_count;
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- if (!format->flip_cbcr) {
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- for (i = 0; i < num_planes; i++)
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- vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
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- } else {
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- WARN_ON_ONCE(num_planes != 3);
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- vc4_dlist_write(vc4_state, vc4_state->offsets[0]);
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- vc4_dlist_write(vc4_state, vc4_state->offsets[2]);
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- vc4_dlist_write(vc4_state, vc4_state->offsets[1]);
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- }
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+ for (i = 0; i < num_planes; i++)
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+ vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
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/* Pointer Context Word 0/1/2: Written by the HVS */
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for (i = 0; i < num_planes; i++)
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