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7444a626e2
This adds some more code for bgmac core rev 4 and it now restarts all cores when initializing the first one on BCM4708. I am just able to send under 100 packages and then DMA TX does not work any more. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 38714
144 lines
4.7 KiB
Diff
144 lines
4.7 KiB
Diff
bgmac: add supprot for BCM4707
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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--- a/drivers/net/ethernet/broadcom/bgmac.c
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+++ b/drivers/net/ethernet/broadcom/bgmac.c
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@@ -887,6 +887,8 @@ static void bgmac_speed(struct bgmac *bg
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set |= BGMAC_CMDCFG_ES_100;
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if (speed & BGMAC_SPEED_1000)
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set |= BGMAC_CMDCFG_ES_1000;
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+ if (speed & BGMAC_SPEED_2500)
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+ set |= BGMAC_CMDCFG_ES_2500;
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if (!bgmac->full_duplex)
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set |= BGMAC_CMDCFG_HD;
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bgmac_cmdcfg_maskset(bgmac, mask, set, true);
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@@ -894,13 +896,28 @@ static void bgmac_speed(struct bgmac *bg
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static void bgmac_miiconfig(struct bgmac *bgmac)
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{
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- u8 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
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- BGMAC_DS_MM_SHIFT;
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- if (imode == 0 || imode == 1) {
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- if (bgmac->autoneg)
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- bgmac_speed(bgmac, BGMAC_SPEED_100);
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- else
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+ struct bcma_device *core = bgmac->core;
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+ struct bcma_chipinfo *ci = &core->bus->chipinfo;
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+
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+ if (ci->id == BCMA_CHIP_ID_BCM4707 ||
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+ ci->id == BCMA_CHIP_ID_BCM53018) {
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+ if (bgmac->autoneg) {
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+ bcma_awrite32(core, BCMA_IOCTL,
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+ bcma_aread32(core, BCMA_IOCTL) | 0x44);
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+
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+ bgmac_speed(bgmac, BGMAC_SPEED_2500);
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+ } else {
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bgmac_speed(bgmac, bgmac->speed);
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+ }
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+ } else {
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+ u8 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
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+ BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
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+ if (imode == 0 || imode == 1) {
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+ if (bgmac->autoneg)
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+ bgmac_speed(bgmac, BGMAC_SPEED_100);
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+ else
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+ bgmac_speed(bgmac, bgmac->speed);
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+ }
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}
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}
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@@ -946,7 +963,8 @@ static void bgmac_chip_reset(struct bgma
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bcma_core_enable(core, flags);
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- if (core->id.rev > 2) {
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+ if (core->id.rev > 2 && ci->id != BCMA_CHIP_ID_BCM4707 &&
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+ ci->id != BCMA_CHIP_ID_BCM53018) {
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bgmac_set(bgmac, BCMA_CLKCTLST, 1 << 8);
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bgmac_wait_value(bgmac->core, BCMA_CLKCTLST, 1 << 24, 1 << 24,
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1000);
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@@ -967,10 +985,13 @@ static void bgmac_chip_reset(struct bgma
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et_swtype &= 0x0f;
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et_swtype <<= 4;
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sw_type = et_swtype;
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- } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 9) {
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+ } else if (ci->id == BCMA_CHIP_ID_BCM5357 &&
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+ ci->pkg == BCMA_PKG_ID_BCM5358) {
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sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
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- } else if ((ci->id != BCMA_CHIP_ID_BCM53572 && ci->pkg == 10) ||
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- (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9)) {
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+ } else if ((ci->id != BCMA_CHIP_ID_BCM53572 &&
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+ ci->pkg == BCMA_PKG_ID_BCM47186) ||
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+ (ci->id == BCMA_CHIP_ID_BCM53572 &&
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+ ci->pkg == BCMA_PKG_ID_BCM47188)) {
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sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
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BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
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}
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@@ -1077,12 +1098,15 @@ static void bgmac_enable(struct bgmac *b
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break;
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}
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- rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
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- rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
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- bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) / 1000000;
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- mdp = (bp_clk * 128 / 1000) - 3;
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- rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
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- bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
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+ if (ci->id != BCMA_CHIP_ID_BCM4707 &&
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+ ci->id != BCMA_CHIP_ID_BCM53018) {
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+ rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
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+ rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
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+ bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) / 1000000;
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+ mdp = (bp_clk * 128 / 1000) - 3;
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+ rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
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+ bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
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+ }
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}
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/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */
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@@ -1488,6 +1512,25 @@ static int bgmac_probe(struct bcma_devic
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goto err_netdev_free;
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}
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+ /* Northstar, take all GMAC cores out of reset */
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+ if (core->id.id == BCMA_CHIP_ID_BCM4707 ||
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+ core->id.id == BCMA_CHIP_ID_BCM53018) {
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+ struct bcma_device *ns_core;
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+ int ns_gmac;
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+
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+ for (ns_gmac = 0; ns_gmac < 4; ns_gmac++) {
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+ /* As northstar requirement, we have to reset all GAMCs before
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+ * accessing them. et_probe() call pci_enable_device() for etx
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+ * and do si_core_reset for GAMCx only. Then the other three
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+ * GAMCs didn't reset. We do it here.
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+ */
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+ ns_core = bcma_find_core_unit(core->bus, BCMA_CORE_MAC_GBIT, ns_gmac);
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+ if (!bcma_core_is_enabled(ns_core)) {
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+ bcma_core_enable(ns_core, 0);
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+ }
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+ }
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+ }
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+
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bgmac_chip_reset(bgmac);
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err = bgmac_dma_alloc(bgmac);
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--- a/drivers/net/ethernet/broadcom/bgmac.h
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+++ b/drivers/net/ethernet/broadcom/bgmac.h
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@@ -185,6 +185,7 @@
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#define BGMAC_CMDCFG_ES_10 0x00000000
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#define BGMAC_CMDCFG_ES_100 0x00000004
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#define BGMAC_CMDCFG_ES_1000 0x00000008
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+#define BGMAC_CMDCFG_ES_2500 0x0000000C
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#define BGMAC_CMDCFG_PROM 0x00000010 /* Set to activate promiscuous mode */
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#define BGMAC_CMDCFG_PAD_EN 0x00000020
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#define BGMAC_CMDCFG_CF 0x00000040
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@@ -345,6 +346,7 @@
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#define BGMAC_SPEED_10 0x0001
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#define BGMAC_SPEED_100 0x0002
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#define BGMAC_SPEED_1000 0x0004
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+#define BGMAC_SPEED_2500 0x0008
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#define BGMAC_WEIGHT 64
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