mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 17:18:59 +00:00
b756ea2a90
Upstream pinctrl driver in drivers/staging uses groups/function/ralink,num-gpios instead of ralink,group/ralink,function/ralink,nr-gpio Replace these properties in dts as well as the pinctrl driver in patches-4.14. This commit is created using: sed -i 's/ralink,group/groups/g' sed -i 's/ralink,function/function/g' sed -i 's/ralink,nr-gpio/ralink,num-gpios/g' Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
118 lines
1.7 KiB
Plaintext
118 lines
1.7 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "mt7620a.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "ralink,mt7620a-v22sg-evb", "ralink,mt7620a-soc";
|
|
model = "Ralink MT7620a V22SG High Power evaluation board";
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
aoss {
|
|
label = "aoss";
|
|
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
};
|
|
|
|
nand {
|
|
compatible = "mtk,mt7620-nand";
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x40000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "u-boot-env";
|
|
reg = <0x40000 0x20000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@60000 {
|
|
label = "factory";
|
|
reg = <0x60000 0x20000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@80000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x80000 0x7f80000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "i2c", "uartf", "spi";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
|
|
mediatek,portmap = "llllw";
|
|
|
|
port@4 {
|
|
status = "okay";
|
|
phy-handle = <&phy4>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
port@5 {
|
|
status = "okay";
|
|
phy-handle = <&phy5>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
mdio-bus {
|
|
status = "okay";
|
|
|
|
phy4: ethernet-phy@4 {
|
|
reg = <4>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
phy5: ethernet-phy@5 {
|
|
reg = <5>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
|
|
&gsw {
|
|
mediatek,port4 = "gmac";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci {
|
|
status = "okay";
|
|
};
|