openwrt/target/linux/generic/pending-5.10/810-pci_disable_common_quirks.patch
John Audia 6b1cd3e345 kernel: bump 5.10 to 5.10.61
Manually rebased:
  bcm27xx/patches-5.10/950-1031-net-lan78xx-Ack-pending-PHY-ints-when-resetting.patch

Removed upstreamed:
  mvebu/patches-5.10/101-cpufreq-armada-37xx-forbid-cpufreq-for-1.2-GHz-variant.patch

All other patches automatically rebased.

Build system: x86_64
Build-tested: bcm2711/RPi4B
Run-tested: bcm2711/RPi4B

No dmesg regressions, everything functional

Signed-off-by: John Audia <graysky@archlinux.us>
2021-08-29 16:30:20 +02:00

63 lines
2.2 KiB
Diff

From: Gabor Juhos <juhosg@openwrt.org>
Subject: debloat: add kernel config option to disabling common PCI quirks
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
drivers/pci/Kconfig | 6 ++++++
drivers/pci/quirks.c | 6 ++++++
2 files changed, 12 insertions(+)
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -118,6 +118,13 @@ config XEN_PCIDEV_FRONTEND
The PCI device frontend driver allows the kernel to import arbitrary
PCI devices from a PCI backend to support PCI driver domains.
+config PCI_DISABLE_COMMON_QUIRKS
+ bool "PCI disable common quirks"
+ depends on PCI
+ help
+ If you don't know what to do here, say N.
+
+
config PCI_ATS
bool
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -206,6 +206,7 @@ static void quirk_mmio_always_on(struct
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
/*
* The Mellanox Tavor device gives false positive parity errors. Mark this
* device with a broken_parity_status to allow PCI scanning code to "skip"
@@ -3322,6 +3323,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
+
/*
* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
* To work around this, query the size it should be configured to by the
@@ -3347,6 +3350,8 @@ static void quirk_intel_ntb(struct pci_d
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
+
/*
* Some BIOS implementations leave the Intel GPU interrupts enabled, even
* though no one is handling them (e.g., if the i915 driver is never
@@ -3385,6 +3390,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
+
/*
* PCI devices which are on Intel chips can skip the 10ms delay
* before entering D3 mode.