mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
269896fed0
Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.135
All patches automatically rebased.
Build system: x86_64
Build-tested: ramips/tplink_archer-a6-v3
Run-tested: ramips/tplink_archer-a6-v3
Signed-off-by: John Audia <therealgraysky@proton.me>
[Refreshed on top of OpenWrt 23.05]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 096bb8ed82)
28 lines
1.1 KiB
Diff
28 lines
1.1 KiB
Diff
From: Tobias Waldekranz <tobias@waldekranz.com>
|
|
Subject: [RFC net-next 7/7] net: dsa: mv88e6xxx: Request assisted learning on CPU port
|
|
Date: Sat, 16 Jan 2021 02:25:15 +0100
|
|
Archived-At: <https://lore.kernel.org/netdev/20210116012515.3152-8-tobias@waldekranz.com/>
|
|
|
|
While the hardware is capable of performing learning on the CPU port,
|
|
it requires alot of additions to the bridge's forwarding path in order
|
|
to handle multi-destination traffic correctly.
|
|
|
|
Until that is in place, opt for the next best thing and let DSA sync
|
|
the relevant addresses down to the hardware FDB.
|
|
|
|
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
|
|
---
|
|
drivers/net/dsa/mv88e6xxx/chip.c | 1 +
|
|
1 file changed, 1 insertion(+)
|
|
|
|
--- a/drivers/net/dsa/mv88e6xxx/chip.c
|
|
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
|
|
@@ -6343,6 +6343,7 @@ static int mv88e6xxx_register_switch(str
|
|
ds->ops = &mv88e6xxx_switch_ops;
|
|
ds->ageing_time_min = chip->info->age_time_coeff;
|
|
ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
|
|
+ ds->assisted_learning_on_cpu_port = true;
|
|
|
|
/* Some chips support up to 32, but that requires enabling the
|
|
* 5-bit port mode, which we do not support. 640k^W16 ought to
|