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e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
148 lines
2.5 KiB
Plaintext
148 lines
2.5 KiB
Plaintext
/dts-v1/;
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#include "rt5350.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "dlink,dwr-512-b", "ralink,rt5350-soc";
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model = "D-Link DWR-512 B";
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aliases {
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led-boot = &led_status;
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led-failsafe = &led_status;
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led-running = &led_status;
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led-upgrade = &led_status;
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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wps {
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label = "wps";
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gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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sms {
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label = "dwr-512-b:green:sms";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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};
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led_status: status {
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label = "dwr-512-b:green:status";
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gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
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};
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2g {
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label = "dwr-512-b:green:2g";
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gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
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};
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3g {
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label = "dwr-512-b:green:3g";
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gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
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};
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sstrengthr {
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label = "dwr-512-b:red:sigstrength";
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gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
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};
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sstrengthg {
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label = "dwr-512-b:green:sigstrength";
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gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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slic_int {
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gpio-export,name = "slic_int";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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};
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modem3g_enable {
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gpio-export,name = "modem3g_enable";
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gpio-export,output = <1>;
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gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <30000000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "jboot";
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reg = <0x0 0x10000>;
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read-only;
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};
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partition@10000 {
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compatible = "amit,jimage";
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label = "firmware";
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reg = <0x10000 0x7e0000>;
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};
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config: partition@7f0000 {
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label = "config";
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reg = <0x7f0000 0x10000>;
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};
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};
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};
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};
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&spi1 {
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status = "okay";
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spidev@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "siliconlabs,si3210";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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&state_default {
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gpio {
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ralink,group = "i2c", "jtag", "uartf";
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ralink,function = "gpio";
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};
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};
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&esw {
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mediatek,portmap = <0x2f>;
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};
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ðernet {
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mtd-mac-address = <&config 0xe07e>;
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};
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&wmac {
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ralink,mtd-eeprom = <&config 0xe08a>;
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ralink,led-polarity = <1>;
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mtd-mac-address = <&config 0xe07e>;
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};
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