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Backport Russell King's series [1] net: mvneta: reduce size of TSO header allocation to pending-5.15 to fix random crashes on Turris Omnia. This also backports two patches that are dependencies to this series: net: mvneta: Delete unused variable net: mvneta: fix potential double-frees in mvneta_txq_sw_deinit() [1] https://lore.kernel.org/netdev/ZCsbJ4nG+So%2Fn9qY@shell.armlinux.org.uk/ Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> (squashed)
180 lines
5.3 KiB
Diff
180 lines
5.3 KiB
Diff
From 58d50fb089da553023df5a05f5ae86feaacc7f24 Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Mon, 3 Apr 2023 19:30:40 +0100
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Subject: [PATCH 5/5] net: mvneta: allocate TSO header DMA memory in chunks
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Now that we no longer need to check whether the DMA address is within
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the TSO header DMA memory range for the queue, we can allocate the TSO
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header DMA memory in chunks rather than one contiguous order-6 chunk,
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which can stress the kernel's memory subsystems to allocate.
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Instead, use order-1 (8k) allocations, which will result in 32 order-1
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pages containing 32 TSO headers.
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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---
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drivers/net/ethernet/marvell/mvneta.c | 88 +++++++++++++++++++++------
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1 file changed, 70 insertions(+), 18 deletions(-)
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--- a/drivers/net/ethernet/marvell/mvneta.c
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+++ b/drivers/net/ethernet/marvell/mvneta.c
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@@ -314,6 +314,15 @@
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#define MVNETA_MAX_SKB_DESCS (MVNETA_MAX_TSO_SEGS * 2 + MAX_SKB_FRAGS)
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+/* The size of a TSO header page */
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+#define MVNETA_TSO_PAGE_SIZE (2 * PAGE_SIZE)
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+
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+/* Number of TSO headers per page. This should be a power of 2 */
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+#define MVNETA_TSO_PER_PAGE (MVNETA_TSO_PAGE_SIZE / TSO_HEADER_SIZE)
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+
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+/* Maximum number of TSO header pages */
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+#define MVNETA_MAX_TSO_PAGES (MVNETA_MAX_TXD / MVNETA_TSO_PER_PAGE)
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+
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/* descriptor aligned size */
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#define MVNETA_DESC_ALIGNED_SIZE 32
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@@ -656,10 +665,10 @@ struct mvneta_tx_queue {
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int next_desc_to_proc;
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/* DMA buffers for TSO headers */
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- char *tso_hdrs;
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+ char *tso_hdrs[MVNETA_MAX_TSO_PAGES];
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/* DMA address of TSO headers */
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- dma_addr_t tso_hdrs_phys;
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+ dma_addr_t tso_hdrs_phys[MVNETA_MAX_TSO_PAGES];
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/* Affinity mask for CPUs*/
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cpumask_t affinity_mask;
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@@ -2592,24 +2601,71 @@ err_drop_frame:
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return rx_done;
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}
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+static void mvneta_free_tso_hdrs(struct mvneta_port *pp,
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+ struct mvneta_tx_queue *txq)
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+{
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+ struct device *dev = pp->dev->dev.parent;
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+ int i;
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+
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+ for (i = 0; i < MVNETA_MAX_TSO_PAGES; i++) {
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+ if (txq->tso_hdrs[i]) {
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+ dma_free_coherent(dev, MVNETA_TSO_PAGE_SIZE,
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+ txq->tso_hdrs[i],
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+ txq->tso_hdrs_phys[i]);
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+ txq->tso_hdrs[i] = NULL;
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+ }
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+ }
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+}
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+
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+static int mvneta_alloc_tso_hdrs(struct mvneta_port *pp,
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+ struct mvneta_tx_queue *txq)
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+{
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+ struct device *dev = pp->dev->dev.parent;
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+ int i, num;
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+
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+ num = DIV_ROUND_UP(txq->size, MVNETA_TSO_PER_PAGE);
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+ for (i = 0; i < num; i++) {
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+ txq->tso_hdrs[i] = dma_alloc_coherent(dev, MVNETA_TSO_PAGE_SIZE,
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+ &txq->tso_hdrs_phys[i],
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+ GFP_KERNEL);
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+ if (!txq->tso_hdrs[i]) {
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+ mvneta_free_tso_hdrs(pp, txq);
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+ return -ENOMEM;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static char *mvneta_get_tso_hdr(struct mvneta_tx_queue *txq, dma_addr_t *dma)
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+{
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+ int index, offset;
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+
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+ index = txq->txq_put_index / MVNETA_TSO_PER_PAGE;
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+ offset = (txq->txq_put_index % MVNETA_TSO_PER_PAGE) * TSO_HEADER_SIZE;
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+
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+ *dma = txq->tso_hdrs_phys[index] + offset;
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+
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+ return txq->tso_hdrs[index] + offset;
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+}
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+
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static void mvneta_tso_put_hdr(struct sk_buff *skb, struct mvneta_tx_queue *txq,
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struct tso_t *tso, int size, bool is_last)
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{
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- int tso_offset, hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
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+ int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
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struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index];
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struct mvneta_tx_desc *tx_desc;
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+ dma_addr_t hdr_phys;
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char *hdr;
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- tso_offset = txq->txq_put_index * TSO_HEADER_SIZE;
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-
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- hdr = txq->tso_hdrs + tso_offset;
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+ hdr = mvneta_get_tso_hdr(txq, &hdr_phys);
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tso_build_hdr(skb, hdr, tso, size, is_last);
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tx_desc = mvneta_txq_next_desc_get(txq);
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tx_desc->data_size = hdr_len;
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tx_desc->command = mvneta_skb_tx_csum(skb);
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tx_desc->command |= MVNETA_TXD_F_DESC;
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- tx_desc->buf_phys_addr = txq->tso_hdrs_phys + tso_offset;
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+ tx_desc->buf_phys_addr = hdr_phys;
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buf->type = MVNETA_TYPE_TSO;
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buf->skb = NULL;
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@@ -3401,7 +3457,7 @@ static void mvneta_rxq_deinit(struct mvn
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static int mvneta_txq_sw_init(struct mvneta_port *pp,
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struct mvneta_tx_queue *txq)
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{
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- int cpu;
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+ int cpu, err;
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txq->size = pp->tx_ring_size;
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@@ -3426,11 +3482,9 @@ static int mvneta_txq_sw_init(struct mvn
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return -ENOMEM;
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/* Allocate DMA buffers for TSO MAC/IP/TCP headers */
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- txq->tso_hdrs = dma_alloc_coherent(pp->dev->dev.parent,
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- txq->size * TSO_HEADER_SIZE,
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- &txq->tso_hdrs_phys, GFP_KERNEL);
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- if (!txq->tso_hdrs)
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- return -ENOMEM;
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+ err = mvneta_alloc_tso_hdrs(pp, txq);
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+ if (err)
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+ return err;
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/* Setup XPS mapping */
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if (pp->neta_armada3700)
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@@ -3482,10 +3536,7 @@ static void mvneta_txq_sw_deinit(struct
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kfree(txq->buf);
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- if (txq->tso_hdrs)
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- dma_free_coherent(pp->dev->dev.parent,
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- txq->size * TSO_HEADER_SIZE,
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- txq->tso_hdrs, txq->tso_hdrs_phys);
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+ mvneta_free_tso_hdrs(pp, txq);
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if (txq->descs)
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dma_free_coherent(pp->dev->dev.parent,
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txq->size * MVNETA_DESC_ALIGNED_SIZE,
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@@ -3494,7 +3545,6 @@ static void mvneta_txq_sw_deinit(struct
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netdev_tx_reset_queue(nq);
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txq->buf = NULL;
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- txq->tso_hdrs = NULL;
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txq->descs = NULL;
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txq->last_desc = 0;
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txq->next_desc_to_proc = 0;
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@@ -5543,6 +5593,8 @@ static int __init mvneta_driver_init(voi
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{
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int ret;
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+ BUILD_BUG_ON_NOT_POWER_OF_2(MVNETA_TSO_PER_PAGE);
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+
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ret = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, "net/mvneta:online",
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mvneta_cpu_online,
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mvneta_cpu_down_prepare);
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