mirror of
https://github.com/openwrt/openwrt.git
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184 lines
3.8 KiB
Plaintext
184 lines
3.8 KiB
Plaintext
/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,xway", "lantiq,ar9";
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cpus {
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cpu@0 {
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compatible = "mips,mips34K";
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};
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};
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memory@0 {
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device_type = "memory";
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};
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biu@1F800000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,biu", "simple-bus";
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reg = <0x1F800000 0x800000>;
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ranges = <0x0 0x1F800000 0x7FFFFF>;
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icu0: icu@80200 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,icu";
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reg = <0x80200 0x28
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0x80228 0x28
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0x80250 0x28
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0x80278 0x28
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0x802a0 0x28>;
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};
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watchdog@803F0 {
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compatible = "lantiq,wdt";
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reg = <0x803F0 0x10>;
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};
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};
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sram@1F000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,sram";
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reg = <0x1F000000 0x800000>;
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ranges = <0x0 0x1F000000 0x7FFFFF>;
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eiu0: eiu@101000 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,eiu-xway";
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reg = <0x101000 0x1000>;
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interrupt-parent = <&icu0>;
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interrupts = <166 135 66 40 41 42>;
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};
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pmu0: pmu@102000 {
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compatible = "lantiq,pmu-xway";
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reg = <0x102000 0x1000>;
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};
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cgu0: cgu@103000 {
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compatible = "lantiq,cgu-xway";
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reg = <0x103000 0x1000>;
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#clock-cells = <1>;
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};
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rcu0: rcu@203000 {
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compatible = "lantiq,rcu-xway";
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reg = <0x203000 0x1000>;
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};
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};
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fpi@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,fpi", "simple-bus";
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ranges = <0x0 0x10000000 0xEEFFFFF>;
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reg = <0x10000000 0xEF00000>;
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localbus@0 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
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1 0 0x4000000 0x4000010>; /* addsel1 */
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compatible = "lantiq,localbus", "simple-bus";
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};
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gptu@E100A00 {
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compatible = "lantiq,gptu-xway";
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reg = <0xE100A00 0x100>;
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interrupt-parent = <&icu0>;
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interrupts = <126 127 128 129 130 131>;
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};
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asc0: serial@E100400 {
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compatible = "lantiq,asc";
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reg = <0xE100400 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <104 105 106>;
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status = "disabled";
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};
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gpio: pinmux@E100B10 {
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compatible = "lantiq,pinctrl-xr9";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0xE100B10 0xA0>;
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};
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asc1: serial@E100C00 {
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compatible = "lantiq,asc";
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reg = <0xE100C00 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <112 113 114>;
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};
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ifxhcd@E101000 {
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compatible = "lantiq,ifxhcd-arx100";
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reg = <0xE101000 0x1000
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0xE120000 0x3f000>;
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interrupt-parent = <&icu0>;
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interrupts = <62 91>;
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status = "disabled";
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};
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deu@E103100 {
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compatible = "lantiq,deu-arx100";
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reg = <0xE103100 0xf00>;
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};
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dma0: dma@E104100 {
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compatible = "lantiq,dma-xway";
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reg = <0xE104100 0x800>;
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};
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ebu0: ebu@E105300 {
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compatible = "lantiq,ebu-xway";
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reg = <0xE105300 0x100>;
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};
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mei@E116000 {
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compatible = "lantiq,mei-xway";
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interrupt-parent = <&icu0>;
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interrupts = <63>;
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};
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etop@E180000 {
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compatible = "lantiq,etop-xway";
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reg = <0xE180000 0x40000
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0xE108000 0x200>;
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interrupt-parent = <&icu0>;
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interrupts = <73 72>;
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mac-address = [ 00 11 22 33 44 55 ];
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};
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ppe@E234000 {
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compatible = "lantiq,ppe-arx100";
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interrupt-parent = <&icu0>;
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interrupts = <96>;
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};
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pci0: pci@E105400 {
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status = "disabled";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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compatible = "lantiq,pci-xway";
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bus-range = <0x0 0x0>;
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ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
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0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
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reg = <0x7000000 0x8000 /* config space */
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0xE105400 0x400>; /* pci bridge */
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lantiq,bus-clock = <33333333>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
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req-mask = <0x1>;
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};
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};
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adsl {
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compatible = "lantiq,adsl-arx100";
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};
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};
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