openwrt/target/linux/ramips/dts/ki_rb.dts
Chuanhong Guo be2b61e4f1 ramips: drop m25p,chunked-io from dts
This option was a spi nor hack which is dropped in commit
bcf4a5f474 ("ramips: remove chunked-io patch and set spi->max_transfer_size instead")

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [edit message]
2019-02-05 19:37:30 +01:00

217 lines
3.5 KiB
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/dts-v1/;
#include "mt7628an.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "zyxel,keenetic-extra-ii", "mediatek,mt7628an-soc";
model = "ZyXEL Keenetic Extra II";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x8000000>;
};
chosen {
bootargs = "console=ttyS0,57600n8";
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
fn {
label = "fn";
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "keenetic-extra-ii:green:power";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
internet {
label = "keenetic-extra-ii:green:internet";
gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
};
wifi {
label = "keenetic-extra-ii:green:wifi";
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
};
usb {
label = "keenetic-extra-ii:green:usb";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port1>, <&ehci_port1>;
linux,default-trigger = "usbport";
};
};
gpio_export {
compatible = "gpio-export";
#size-cells = <0>;
usbpower {
gpio-export,name = "usbpower";
gpio-export,output = <1>;
gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
};
};
};
&spi0 {
status = "okay";
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-config";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "rf-eeprom";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xe90000>;
};
partition@ee0000 {
label = "config_1";
reg = <0xee0000 0x10000>;
read-only;
};
partition@ef0000 {
label = "storage";
reg = <0xef0000 0x100000>;
read-only;
};
partition@ff0000 {
label = "dump";
reg = <0xff0000 0x10000>;
read-only;
};
partition@1000000 {
label = "u-state";
reg = <0x1000000 0x30000>;
read-only;
};
partition@1030000 {
label = "u-config_res";
reg = <0x1030000 0x10000>;
read-only;
};
partition@1040000 {
label = "rf-eeprom_res";
reg = <0x1040000 0x10000>;
read-only;
};
partition@1050000 {
label = "firmware_2";
reg = <0x1050000 0xe90000>;
read-only;
};
partition@1ee0000 {
label = "config_2";
reg = <0x1ee0000 0x10000>;
read-only;
};
};
};
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&ethernet {
mtd-mac-address = <&factory 0x4>;
mediatek,portmap = "wllll";
};
&wmac {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0x8004>;
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "gpio", "i2s", "refclk", "spi cs1", "uart1", "wled_an";
ralink,function = "gpio";
};
};
};