openwrt/target/linux/ath79/dts/ar7240_tl-wr740n-v2.dts
Chuanhong Guo c463320812 ath79: Remove all memory nodes defined in dts
This target can automatically detect the correct memory size and we've
been using it for long in ar71xx.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-06-28 18:39:57 +02:00

170 lines
2.8 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar7240.dtsi"
/ {
compatible = "tplink,tl-wr740n-v2", "qca,ar7240";
model = "TP-Link TL-WR740N v2";
aliases {
led-status = &led_system;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&switch_led_pins>;
led_system: system {
label = "tl-wr740n-v2:green:system";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "tl-wr740n-v2:green:lan1";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "tl-wr740n-v2:green:lan2";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "tl-wr740n-v2:green:lan3";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "tl-wr740n-v2:green:lan4";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
wan {
label = "tl-wr740n-v2:green:wan";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
wlan {
label = "tl-wr740n-v2:green:wlan";
gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "phy0tpt";
};
wps {
label = "tl-wr740n-v2:green:wps";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
};
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
reg = <0x0 0x20000>;
label = "u-boot";
read-only;
};
firmware: partition@20000 {
reg = <0x20000 0x3d0000>;
label = "firmware";
};
art: partition@3f0000 {
reg = <0x3f0000 0x10000>;
label = "art";
read-only;
};
};
};
};
&eth0 {
status = "okay";
phy-handle = <&phy4>;
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <(-1)>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <1>;
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "mii";
};
};
&pcie {
status = "okay";
ath9k: wifi@168c,002b {
compatible = "pci168c,002b";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
mtd-mac-address = <&uboot 0x1fc00>;
#gpio-cells = <2>;
gpio-controller;
};
};
&pinmux {
switch_led_pins: pinmux_switch_led_pins {
pinctrl-single,bits = <0x0 0x0 0xf8>;
};
};
&uart {
status = "okay";
};