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https://github.com/openwrt/openwrt.git
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c6c731fe31
Add support for NXP layerscape ls1043ardb 64b/32b Dev board. LS1043a is an SoC with 4x64-bit up to 1.6 GHz ARMv8 A53 cores. ls1043ardb support features as: 2GB DDR4, 128MB NOR/512MB NAND, USB3.0, eSDHC, I2C, GPIO, PCIe/Mini-PCIe, 6x1G/1x10G network port, etc. 64b/32b ls1043ardb target is using 4.4 kernel, and rcw/u-boot/fman images from NXP QorIQ SDK release. All of 4.4 kernel patches porting from SDK release or upstream. QorIQ SDK ISOs can be downloaded from this location: http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
524 lines
12 KiB
Diff
524 lines
12 KiB
Diff
From ad6176d72132d020317db1496be1485056ac88d7 Mon Sep 17 00:00:00 2001
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From: Liu Gang <Gang.Liu@nxp.com>
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Date: Mon, 6 Jun 2016 15:46:00 +0800
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Subject: [PATCH 28/70] dts/ls1043: update dts for ls1043
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Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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---
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arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 59 +++++
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arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 264 +++++++++++++++++++-
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.../boot/dts/freescale/qoriq-qman1-portals.dtsi | 10 +-
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3 files changed, 321 insertions(+), 12 deletions(-)
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
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@@ -50,6 +50,10 @@
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/ {
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model = "LS1043A RDB Board";
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compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
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+
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+ aliases {
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+ crypto = &crypto;
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+ };
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};
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&i2c0 {
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@@ -108,6 +112,35 @@
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};
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};
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+&dspi0 {
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+ bus-num = <0>;
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+ status = "okay";
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+
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+ flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */
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+ reg = <0>;
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+ spi-max-frequency = <1000000>; /* input clock */
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+ };
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+
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+ slic@2 {
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+ compatible = "maxim,ds26522";
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+ reg = <2>;
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+ spi-max-frequency = <2000000>;
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+ fsl,spi-cs-sck-delay = <100>;
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+ fsl,spi-sck-cs-delay = <50>;
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+ };
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+
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+ slic@3 {
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+ compatible = "maxim,ds26522";
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+ reg = <3>;
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+ spi-max-frequency = <2000000>;
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+ fsl,spi-cs-sck-delay = <100>;
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+ fsl,spi-sck-cs-delay = <50>;
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+ };
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+};
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+
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&duart0 {
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status = "okay";
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};
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@@ -176,7 +209,33 @@
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mdio@fd000 {
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aqr105_phy: ethernet-phy@c {
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compatible = "ethernet-phy-ieee802.3-c45";
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+ interrupts = <0 132 4>;
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reg = <0x1>;
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};
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};
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};
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+
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+&uqe {
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+ ucc_hdlc: ucc@2000 {
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+ compatible = "fsl,ucc_hdlc";
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+ rx-clock-name = "clk8";
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+ tx-clock-name = "clk9";
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+ fsl,rx-sync-clock = "rsync_pin";
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+ fsl,tx-sync-clock = "tsync_pin";
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+ fsl,tx-timeslot = <0xfffffffe>;
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+ fsl,rx-timeslot = <0xfffffffe>;
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+ fsl,tdm-framer-type = "e1";
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+ fsl,tdm-mode = "normal";
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+ fsl,tdm-id = <0>;
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+ fsl,siram-entry-id = <0>;
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+ fsl,tdm-interface;
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+ };
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+
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+ ucc_serial: ucc@2200 {
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+ device_type = "serial";
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+ compatible = "ucc_uart";
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+ port-number = <0>;
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+ rx-clock-name = "brg2";
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+ tx-clock-name = "brg2";
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+ };
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+};
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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@@ -44,6 +44,8 @@
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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+#include <dt-bindings/thermal/thermal.h>
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+
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/ {
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compatible = "fsl,ls1043a";
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interrupt-parent = <&gic>;
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@@ -75,6 +77,7 @@
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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clocks = <&clockgen 1 0>;
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+ #cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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@@ -118,6 +121,8 @@
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<1 14 0x1>, /* Physical Non-Secure PPI */
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<1 11 0x1>, /* Virtual PPI */
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<1 10 0x1>; /* Hypervisor PPI */
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+ arm,reread-timer;
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+ fsl,erratum-a008585;
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};
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pmu {
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@@ -162,11 +167,64 @@
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big-endian;
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};
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+ crypto: crypto@1700000 {
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+ compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
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+ "fsl,sec-v4.0";
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+ fsl,sec-era = <3>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0x0 0x00 0x1700000 0x100000>;
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+ reg = <0x00 0x1700000 0x0 0x100000>;
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+ interrupts = <0 75 0x4>;
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+
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+ sec_jr0: jr@10000 {
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+ compatible = "fsl,sec-v5.4-job-ring",
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+ "fsl,sec-v5.0-job-ring",
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+ "fsl,sec-v4.0-job-ring";
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+ reg = <0x10000 0x10000>;
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+ interrupts = <0 71 0x4>;
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+ };
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+
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+ sec_jr1: jr@20000 {
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+ compatible = "fsl,sec-v5.4-job-ring",
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+ "fsl,sec-v5.0-job-ring",
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+ "fsl,sec-v4.0-job-ring";
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+ reg = <0x20000 0x10000>;
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+ interrupts = <0 72 0x4>;
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+ };
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+
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+ sec_jr2: jr@30000 {
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+ compatible = "fsl,sec-v5.4-job-ring",
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+ "fsl,sec-v5.0-job-ring",
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+ "fsl,sec-v4.0-job-ring";
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+ interrupts = <0 73 0x4>;
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+ };
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+
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+ sec_jr3: jr@40000 {
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+ compatible = "fsl,sec-v5.4-job-ring",
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+ "fsl,sec-v5.0-job-ring",
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+ "fsl,sec-v4.0-job-ring";
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+ reg = <0x40000 0x10000>;
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+ interrupts = <0 74 0x4>;
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+ };
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+ };
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+
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dcfg: dcfg@1ee0000 {
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compatible = "fsl,ls1043a-dcfg", "syscon";
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reg = <0x0 0x1ee0000 0x0 0x10000>;
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};
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+ reset: reset@1EE00B0 {
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+ compatible = "fsl,ls-reset";
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+ reg = <0x0 0x1EE00B0 0x0 0x4>;
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+ big-endian;
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+ };
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+
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+ rcpm: rcpm@1ee2000 {
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+ compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1";
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+ reg = <0x0 0x1ee2000 0x0 0x10000>;
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+ };
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+
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ifc: ifc@1530000 {
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compatible = "fsl,ifc", "simple-bus";
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reg = <0x0 0x1530000 0x0 0x10000>;
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@@ -501,6 +559,82 @@
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};
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};
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+ tmu: tmu@1f00000 {
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+ compatible = "fsl,qoriq-tmu", "fsl,ls1043a-tmu";
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+ reg = <0x0 0x1f00000 0x0 0x10000>;
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+ interrupts = <0 33 0x4>;
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+ fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
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+ fsl,tmu-calibration = <0x00000000 0x00000026
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+ 0x00000001 0x0000002d
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+ 0x00000002 0x00000032
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+ 0x00000003 0x00000039
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+ 0x00000004 0x0000003f
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+ 0x00000005 0x00000046
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+ 0x00000006 0x0000004d
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+ 0x00000007 0x00000054
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+ 0x00000008 0x0000005a
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+ 0x00000009 0x00000061
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+ 0x0000000a 0x0000006a
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+ 0x0000000b 0x00000071
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+
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+ 0x00010000 0x00000025
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+ 0x00010001 0x0000002c
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+ 0x00010002 0x00000035
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+ 0x00010003 0x0000003d
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+ 0x00010004 0x00000045
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+ 0x00010005 0x0000004e
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+ 0x00010006 0x00000057
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+ 0x00010007 0x00000061
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+ 0x00010008 0x0000006b
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+ 0x00010009 0x00000076
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+
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+ 0x00020000 0x00000029
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+ 0x00020001 0x00000033
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+ 0x00020002 0x0000003d
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+ 0x00020003 0x00000049
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+ 0x00020004 0x00000056
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+ 0x00020005 0x00000061
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+ 0x00020006 0x0000006d
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+
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+ 0x00030000 0x00000021
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+ 0x00030001 0x0000002a
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+ 0x00030002 0x0000003c
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+ 0x00030003 0x0000004e>;
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+ big-endian;
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+ #thermal-sensor-cells = <1>;
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+ };
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+
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+ thermal-zones {
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+ cpu_thermal: cpu-thermal {
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+ polling-delay-passive = <1000>;
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+ polling-delay = <5000>;
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+
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+ thermal-sensors = <&tmu 3>;
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+
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+ trips {
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+ cpu_alert: cpu-alert {
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+ temperature = <85000>;
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+ hysteresis = <2000>;
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+ type = "passive";
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+ };
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+ cpu_crit: cpu-crit {
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+ temperature = <95000>;
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+ hysteresis = <2000>;
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+ type = "critical";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map0 {
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+ trip = <&cpu_alert>;
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+ cooling-device =
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+ <&cpu0 THERMAL_NO_LIMIT
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+ THERMAL_NO_LIMIT>;
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+ };
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+ };
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+ };
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+ };
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+
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dspi0: dspi@2100000 {
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compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
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#address-cells = <1>;
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@@ -527,6 +661,20 @@
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status = "disabled";
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};
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+ qspi: quadspi@1550000 {
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+ compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0x0 0x1550000 0x0 0x10000>,
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+ <0x0 0x40000000 0x0 0x4000000>;
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+ reg-names = "QuadSPI", "QuadSPI-memory";
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+ interrupts = <0 99 0x4>;
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+ clock-names = "qspi_en", "qspi";
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+ clocks = <&clockgen 4 0>, <&clockgen 4 0>;
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+ big-endian;
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+ status = "disabled";
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+ };
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+
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i2c0: i2c@2180000 {
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compatible = "fsl,vf610-i2c";
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#address-cells = <1>;
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@@ -602,8 +750,8 @@
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clocks = <&clockgen 4 0>;
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};
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- gpio1: gpio@2300000 {
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- compatible = "fsl,ls1043a-gpio";
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+ gpio0: gpio@2300000 {
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+ compatible = "fsl,qoriq-gpio";
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reg = <0x0 0x2300000 0x0 0x10000>;
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interrupts = <0 66 0x4>;
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gpio-controller;
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@@ -612,8 +760,8 @@
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#interrupt-cells = <2>;
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};
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- gpio2: gpio@2310000 {
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- compatible = "fsl,ls1043a-gpio";
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+ gpio1: gpio@2310000 {
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+ compatible = "fsl,qoriq-gpio";
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reg = <0x0 0x2310000 0x0 0x10000>;
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interrupts = <0 67 0x4>;
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gpio-controller;
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@@ -622,8 +770,8 @@
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#interrupt-cells = <2>;
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};
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- gpio3: gpio@2320000 {
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- compatible = "fsl,ls1043a-gpio";
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+ gpio2: gpio@2320000 {
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+ compatible = "fsl,qoriq-gpio";
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reg = <0x0 0x2320000 0x0 0x10000>;
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interrupts = <0 68 0x4>;
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gpio-controller;
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@@ -632,8 +780,8 @@
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#interrupt-cells = <2>;
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};
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- gpio4: gpio@2330000 {
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- compatible = "fsl,ls1043a-gpio";
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+ gpio3: gpio@2330000 {
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+ compatible = "fsl,qoriq-gpio";
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reg = <0x0 0x2330000 0x0 0x10000>;
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interrupts = <0 134 0x4>;
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gpio-controller;
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@@ -642,6 +790,70 @@
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#interrupt-cells = <2>;
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};
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+ uqe: uqe@2400000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ device_type = "qe";
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+ compatible = "fsl,qe", "simple-bus";
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+ ranges = <0x0 0x0 0x2400000 0x40000>;
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+ reg = <0x0 0x2400000 0x0 0x480>;
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+ brg-frequency = <100000000>;
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+ bus-frequency = <200000000>;
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+
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+ fsl,qe-num-riscs = <1>;
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+ fsl,qe-num-snums = <28>;
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+
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+ qeic: qeic@80 {
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+ compatible = "fsl,qe-ic";
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+ reg = <0x80 0x80>;
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+ #address-cells = <0>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ interrupts = <0 77 0x04 0 77 0x04>;
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+ };
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+
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+ si1: si@700 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,qe-si";
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+ reg = <0x700 0x80>;
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+ };
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+
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+ siram1: siram@1000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "fsl,qe-siram";
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+ reg = <0x1000 0x800>;
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+ };
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+
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+ ucc@2000 {
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+ cell-index = <1>;
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+ reg = <0x2000 0x200>;
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+ interrupts = <32>;
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+ interrupt-parent = <&qeic>;
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+ };
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+
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+ ucc@2200 {
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+ cell-index = <3>;
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+ reg = <0x2200 0x200>;
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+ interrupts = <34>;
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+ interrupt-parent = <&qeic>;
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+ };
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+
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+ muram@10000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
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+ ranges = <0x0 0x10000 0x6000>;
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+
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+ data-only@0 {
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+ compatible = "fsl,qe-muram-data",
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+ "fsl,cpm-muram-data";
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+ reg = <0x0 0x6000>;
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+ };
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+ };
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+ };
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+
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lpuart0: serial@2950000 {
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compatible = "fsl,ls1021a-lpuart";
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reg = <0x0 0x2950000 0x0 0x1000>;
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@@ -696,6 +908,15 @@
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status = "disabled";
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};
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+ ftm0: ftm0@29d0000 {
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+ compatible = "fsl,ftm-alarm";
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+ reg = <0x0 0x29d0000 0x0 0x10000>;
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+ interrupts = <0 86 0x4>;
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+ big-endian;
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+ rcpm-wakeup = <&rcpm 0x0 0x20000000>;
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+ status = "okay";
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+ };
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+
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wdog0: wdog@2ad0000 {
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compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
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reg = <0x0 0x2ad0000 0x0 0x10000>;
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@@ -726,6 +947,8 @@
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reg = <0x0 0x2f00000 0x0 0x10000>;
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interrupts = <0 60 0x4>;
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dr_mode = "host";
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+ configure-gfladj;
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+ snps,dis_rxdet_inp3_quirk;
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};
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usb1: usb3@3000000 {
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@@ -733,6 +956,8 @@
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reg = <0x0 0x3000000 0x0 0x10000>;
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interrupts = <0 61 0x4>;
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dr_mode = "host";
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+ configure-gfladj;
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+ snps,dis_rxdet_inp3_quirk;
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};
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usb2: usb3@3100000 {
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@@ -740,6 +965,8 @@
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reg = <0x0 0x3100000 0x0 0x10000>;
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interrupts = <0 63 0x4>;
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dr_mode = "host";
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+ configure-gfladj;
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+ snps,dis_rxdet_inp3_quirk;
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};
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sata: sata@3200000 {
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@@ -749,6 +976,20 @@
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clocks = <&clockgen 4 0>;
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};
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+ qdma: qdma@8380000 {
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+ compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
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+ reg = <0x0 0x838f000 0x0 0x11000 /* Controller regs */
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+ 0x0 0x83a0000 0x0 0x40000>; /* Block regs */
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+ interrupts = <0 152 0x4>,
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+ <0 39 0x4>;
|
|
+ interrupt-names = "qdma-error", "qdma-queue";
|
|
+ channels = <8>;
|
|
+ queues = <2>;
|
|
+ status-sizes = <64>;
|
|
+ queue-sizes = <64 64>;
|
|
+ big-endian;
|
|
+ };
|
|
+
|
|
msi1: msi-controller1@1571000 {
|
|
compatible = "fsl,1s1043a-msi";
|
|
reg = <0x0 0x1571000 0x0 0x4>,
|
|
@@ -787,6 +1028,7 @@
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
device_type = "pci";
|
|
+ dma-coherent;
|
|
num-lanes = <4>;
|
|
bus-range = <0x0 0xff>;
|
|
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
|
|
@@ -811,6 +1053,7 @@
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
device_type = "pci";
|
|
+ dma-coherent;
|
|
num-lanes = <2>;
|
|
bus-range = <0x0 0xff>;
|
|
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
|
|
@@ -835,6 +1078,7 @@
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
device_type = "pci";
|
|
+ dma-coherent;
|
|
num-lanes = <2>;
|
|
bus-range = <0x0 0xff>;
|
|
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
|
|
@@ -897,8 +1141,8 @@
|
|
alignment = <0 0x1000000>;
|
|
};
|
|
qman_fqd: qman-fqd {
|
|
- size = <0 0x400000>;
|
|
- alignment = <0 0x400000>;
|
|
+ size = <0 0x800000>;
|
|
+ alignment = <0 0x800000>;
|
|
};
|
|
qman_pfdr: qman-pfdr {
|
|
size = <0 0x2000000>;
|
|
--- a/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
|
|
+++ b/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
|
|
@@ -132,5 +132,11 @@
|
|
compatible = "fsl,cgrid-range";
|
|
fsl,cgrid-range = <0 256>;
|
|
};
|
|
-
|
|
-};
|
|
\ No newline at end of file
|
|
+ qman-ceetm@0 {
|
|
+ compatible = "fsl,qman-ceetm";
|
|
+ fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
|
|
+ fsl,ceetm-sp-range = <0 12>;
|
|
+ fsl,ceetm-lni-range = <0 8>;
|
|
+ fsl,ceetm-channel-range = <0 32>;
|
|
+ };
|
|
+};
|