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c6c731fe31
Add support for NXP layerscape ls1043ardb 64b/32b Dev board. LS1043a is an SoC with 4x64-bit up to 1.6 GHz ARMv8 A53 cores. ls1043ardb support features as: 2GB DDR4, 128MB NOR/512MB NAND, USB3.0, eSDHC, I2C, GPIO, PCIe/Mini-PCIe, 6x1G/1x10G network port, etc. 64b/32b ls1043ardb target is using 4.4 kernel, and rcw/u-boot/fman images from NXP QorIQ SDK release. All of 4.4 kernel patches porting from SDK release or upstream. QorIQ SDK ISOs can be downloaded from this location: http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
35 lines
1.3 KiB
Diff
35 lines
1.3 KiB
Diff
From 481b1bc4ce0d58107887558342e50d6323a9601d Mon Sep 17 00:00:00 2001
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From: Jisheng Zhang <jszhang@marvell.com>
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Date: Thu, 7 Jan 2016 14:12:38 +0800
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Subject: [PATCH 54/70] PCI: designware: Explain why we don't program ATU for
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some platforms
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Some platforms don't support ATU, e.g., pci-keystone.c. These platforms
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use their own address translation component rather than ATU, and they
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provide the rd_other_conf and wr_other_conf methods to program the
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translation component and perform the access.
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Add a comment to explain why we don't program the ATU for these platforms.
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[bhelgaas: changelog]
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Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
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Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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---
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drivers/pci/host/pcie-designware.c | 5 +++++
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1 file changed, 5 insertions(+)
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -517,6 +517,11 @@ int dw_pcie_host_init(struct pcie_port *
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if (pp->ops->host_init)
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pp->ops->host_init(pp);
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+ /*
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+ * If the platform provides ->rd_other_conf, it means the platform
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+ * uses its own address translation component rather than ATU, so
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+ * we should not program the ATU here.
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+ */
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if (!pp->ops->rd_other_conf)
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dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX1,
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PCIE_ATU_TYPE_MEM, pp->mem_base,
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