mirror of
https://github.com/openwrt/openwrt.git
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319 lines
6.5 KiB
Plaintext
319 lines
6.5 KiB
Plaintext
/include/ "vr9.dtsi"
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/ {
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chosen {
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bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
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};
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memory@0 {
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reg = <0x0 0x4000000>;
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};
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fpi@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,fpi", "simple-bus";
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ranges = <0x0 0x10000000 0xEEFFFFF>;
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reg = <0x10000000 0xEF00000>;
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localbus@0 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "lantiq,localbus", "simple-bus";
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};
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sflash@E100800 {
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compatible = "lantiq,sflash";
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reg = <0xE100800 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "uboot";
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reg = <0x00000 0x10000>;
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};
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partition@10000 {
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label = "uboot_env";
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reg = <0x10000 0x10000>;
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};
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partition@20000 {
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label = "linux";
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reg = <0x20000 0x1d0000>;
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};
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};
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gpio: pinmux@E100B10 {
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compatible = "lantiq,pinctrl-xr9";
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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interrupt-parent = <&icu0>;
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interrupts = <166 135 66 40 41 42 38>;
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0xE100B10 0xA0>;
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state_default: pinmux {
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stp {
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lantiq,groups = "stp";
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lantiq,function = "stp";
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};
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/*spi {
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lantiq,groups = "spi", "spi_cs4";
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lantiq,function = "spi";
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};*/
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nand {
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lantiq,groups = "nand cle", "nand ale",
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"nand rd", "nand rdy";
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lantiq,function = "ebu";
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};
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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pci {
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lantiq,groups = "gnt1", "req1";
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lantiq,function = "pci";
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};
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exin {
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lantiq,groups = "exin3";
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lantiq,function = "exin";
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};
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conf_out {
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lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
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"io4", "io5", "io6", /* stp */
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"io17", "io18", /* spi dout & clk */
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"io21", /* pci-rst */
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"io38"; /* pcie-rst */
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lantiq,open-drain;
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lantiq,pull = <0>;
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};
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conf_in {
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lantiq,pins = "io39", /* exin3 */
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"io48"; /* nand rdy */
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lantiq,pull = <2>;
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};
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};
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};
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eth@0xE108000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-net";
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reg = < 0xE108000 0x3000 /* switch */
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0xE10B100 0x70 /* mdio */
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0xE10B1D8 0x30 /* mii */
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0xE10B308 0x30 /* pmac */
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>;
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interrupt-parent = <&icu0>;
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interrupts = <73 72>;
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mac-address = [ 00 11 22 33 44 55 ];
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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ethernet@1 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <1>;
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phy-mode = "rgmii";
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phy-handle = <&phy1>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "gmii";
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phy-handle = <&phy11>;
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};
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ethernet@4 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phynmode0 = "gmii";
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phy-handle = <&phy13>;
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};
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};
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wan: interface@1 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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mac-address = [ 00 11 22 33 44 56 ];
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ethernet@5 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <5>;
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phy-mode = "rgmii";
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phy-handle = <&phy5>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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lantiq,c45-reg-init = <1 0 0 0>;
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};
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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lantiq,c45-reg-init = <1 0 0 0>;
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};
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phy5: ethernet-phy@5 {
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reg = <0x5>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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lantiq,c45-reg-init = <1 0 0 0>;
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};
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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lantiq,c45-reg-init = <1 0 0 0>;
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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lantiq,c45-reg-init = <1 0 0 0>;
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};
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};
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};
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stp: stp@E100BB0 {
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compatible = "lantiq,gpio-stp-xway";
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reg = <0xE100BB0 0x40>;
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#gpio-cells = <2>;
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gpio-controller;
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lantiq,shadow = <0xffff>;
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lantiq,groups = <0x7>;
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lantiq,dsl = <0x3>;
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lantiq,phy1 = <0x7>;
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lantiq,phy2 = <0x7>;
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/* lantiq,rising; */
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};
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pci@E105400 {
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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compatible = "lantiq,pci-xway";
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bus-range = <0x0 0x0>;
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ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
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0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
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reg = <0x7000000 0x8000 /* config space */
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0xE105400 0x400>; /* pci bridge */
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lantiq,bus-clock = <33333333>;
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/*lantiq,external-clock;*/
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lantiq,delay-hi = <0>; /* 0ns delay */
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lantiq,delay-lo = <0>; /* 0.0ns delay */
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
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>;
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gpios-reset = <&gpio 21 0>;
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req-mask = <0x1>; /* GNT1 */
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};
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};
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ifxhcd {
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compatible = "lantiq,ifxhcd";
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interrupt-parent = <&icu0>;
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interrupts = <62 91>;
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};
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gphy-xrx200 {
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compatible = "lantiq,phy-xrx200";
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firmware = "lantiq/vr9_phy11g_a2x.bin";
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phys = [ 00 01 ];
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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reset {
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label = "Reset";
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gpios = <&gpio 7 0>;
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linux,code = <0x100>;
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};
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paging {
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label = "paging";
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gpios = <&gpio 11 1>;
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linux,code = <0x100>;
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};
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};
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/* gpio-keys {
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compatible = "gpio-keys";
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wps {
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gpios = <&gpio 39 0>;
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linux,code = <0x100>;
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};
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};*/
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gpio-leds {
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compatible = "gpio-leds";
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led0 {
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label = "led0";
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gpios = <&stp 9 0>;
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default-state = "on";
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};
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warning {
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label = "warning";
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gpios = <&stp 22 0>;
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default-state = "on";
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};
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fxs1 {
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label = "fxs1";
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gpios = <&stp 21 0>;
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default-state = "on";
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};
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fxs2 {
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label = "fxs2";
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gpios = <&stp 20 0>;
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default-state = "on";
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};
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fxo {
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label = "fxo";
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gpios = <&stp 19 0>;
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default-state = "on";
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};
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usb1 {
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label = "usb1";
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gpios = <&stp 18 0>;
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default-state = "on";
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};
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usb2 {
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label = "usb2";
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gpios = <&stp 15 0>;
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default-state = "on";
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};
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sd {
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label = "sd";
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gpios = <&stp 14 0>;
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default-state = "on";
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};
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wps {
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label = "wps";
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gpios = <&stp 12 0>;
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default-state = "on";
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};
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};
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};
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