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https://github.com/openwrt/openwrt.git
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f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
940 lines
22 KiB
Diff
940 lines
22 KiB
Diff
From d13c94482be9ca356df8a04f8fd5f3738dc31ab1 Mon Sep 17 00:00:00 2001
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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Date: Fri, 4 Oct 2019 13:05:25 -0300
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Subject: [PATCH] media: i2c: Add IMX290 CMOS image sensor driver
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Commit 828dbc299278065b634e913d2700d254a3224853 upstream.
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Add driver for Sony IMX290 CMOS image sensor driver. The driver only
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supports I2C interface for programming and MIPI CSI-2 for sensor output.
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[Sakari Ailus: Rewrapped a few lines over 80 chars a little.]
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Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
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Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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---
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drivers/media/i2c/Kconfig | 11 +
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drivers/media/i2c/Makefile | 1 +
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drivers/media/i2c/imx290.c | 884 +++++++++++++++++++++++++++++++++++++
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3 files changed, 896 insertions(+)
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create mode 100644 drivers/media/i2c/imx290.c
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--- a/drivers/media/i2c/Kconfig
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+++ b/drivers/media/i2c/Kconfig
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@@ -609,6 +609,17 @@ config VIDEO_IMX274
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This is a V4L2 sensor driver for the Sony IMX274
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CMOS image sensor.
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+config VIDEO_IMX290
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+ tristate "Sony IMX290 sensor support"
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+ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
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+ select V4L2_FWNODE
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+ help
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+ This is a Video4Linux2 sensor driver for the Sony
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+ IMX290 camera sensor.
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+
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+ To compile this driver as a module, choose M here: the
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+ module will be called imx290.
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+
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config VIDEO_IMX477
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tristate "Sony IMX477 sensor support"
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depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
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--- a/drivers/media/i2c/Makefile
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+++ b/drivers/media/i2c/Makefile
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@@ -114,6 +114,7 @@ obj-$(CONFIG_VIDEO_IMX214) += imx214.o
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obj-$(CONFIG_VIDEO_IMX219) += imx219.o
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obj-$(CONFIG_VIDEO_IMX258) += imx258.o
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obj-$(CONFIG_VIDEO_IMX274) += imx274.o
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+obj-$(CONFIG_VIDEO_IMX290) += imx290.o
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obj-$(CONFIG_VIDEO_IMX477) += imx477.o
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obj-$(CONFIG_VIDEO_IMX319) += imx319.o
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obj-$(CONFIG_VIDEO_IMX355) += imx355.o
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--- /dev/null
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+++ b/drivers/media/i2c/imx290.c
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@@ -0,0 +1,884 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Sony IMX290 CMOS Image Sensor Driver
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+ *
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+ * Copyright (C) 2019 FRAMOS GmbH.
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+ *
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+ * Copyright (C) 2019 Linaro Ltd.
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+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/delay.h>
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+#include <linux/gpio/consumer.h>
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+#include <linux/i2c.h>
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+#include <linux/module.h>
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+#include <linux/pm_runtime.h>
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+#include <linux/regmap.h>
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+#include <linux/regulator/consumer.h>
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+#include <media/media-entity.h>
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+#include <media/v4l2-ctrls.h>
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+#include <media/v4l2-device.h>
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+#include <media/v4l2-fwnode.h>
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+#include <media/v4l2-subdev.h>
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+
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+#define IMX290_STANDBY 0x3000
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+#define IMX290_REGHOLD 0x3001
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+#define IMX290_XMSTA 0x3002
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+#define IMX290_GAIN 0x3014
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+
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+#define IMX290_DEFAULT_LINK_FREQ 445500000
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+
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+static const char * const imx290_supply_name[] = {
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+ "vdda",
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+ "vddd",
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+ "vdddo",
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+};
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+
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+#define IMX290_NUM_SUPPLIES ARRAY_SIZE(imx290_supply_name)
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+
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+struct imx290_regval {
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+ u16 reg;
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+ u8 val;
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+};
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+
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+struct imx290_mode {
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+ u32 width;
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+ u32 height;
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+ u32 pixel_rate;
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+ u32 link_freq_index;
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+
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+ const struct imx290_regval *data;
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+ u32 data_size;
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+};
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+
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+struct imx290 {
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+ struct device *dev;
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+ struct clk *xclk;
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+ struct regmap *regmap;
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+
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+ struct v4l2_subdev sd;
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+ struct v4l2_fwnode_endpoint ep;
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+ struct media_pad pad;
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+ struct v4l2_mbus_framefmt current_format;
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+ const struct imx290_mode *current_mode;
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+
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+ struct regulator_bulk_data supplies[IMX290_NUM_SUPPLIES];
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+ struct gpio_desc *rst_gpio;
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+
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+ struct v4l2_ctrl_handler ctrls;
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+ struct v4l2_ctrl *link_freq;
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+ struct v4l2_ctrl *pixel_rate;
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+
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+ struct mutex lock;
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+};
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+
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+struct imx290_pixfmt {
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+ u32 code;
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+};
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+
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+static const struct imx290_pixfmt imx290_formats[] = {
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+ { MEDIA_BUS_FMT_SRGGB10_1X10 },
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+};
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+
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+static const struct regmap_config imx290_regmap_config = {
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+ .reg_bits = 16,
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+ .val_bits = 8,
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+ .cache_type = REGCACHE_RBTREE,
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+};
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+
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+static const struct imx290_regval imx290_global_init_settings[] = {
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+ { 0x3007, 0x00 },
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+ { 0x3009, 0x00 },
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+ { 0x3018, 0x65 },
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+ { 0x3019, 0x04 },
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+ { 0x301a, 0x00 },
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+ { 0x3443, 0x03 },
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+ { 0x3444, 0x20 },
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+ { 0x3445, 0x25 },
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+ { 0x3407, 0x03 },
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+ { 0x303a, 0x0c },
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+ { 0x3040, 0x00 },
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+ { 0x3041, 0x00 },
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+ { 0x303c, 0x00 },
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+ { 0x303d, 0x00 },
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+ { 0x3042, 0x9c },
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+ { 0x3043, 0x07 },
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+ { 0x303e, 0x49 },
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+ { 0x303f, 0x04 },
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+ { 0x304b, 0x0a },
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+ { 0x300f, 0x00 },
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+ { 0x3010, 0x21 },
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+ { 0x3012, 0x64 },
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+ { 0x3016, 0x09 },
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+ { 0x3070, 0x02 },
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+ { 0x3071, 0x11 },
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+ { 0x309b, 0x10 },
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+ { 0x309c, 0x22 },
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+ { 0x30a2, 0x02 },
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+ { 0x30a6, 0x20 },
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+ { 0x30a8, 0x20 },
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+ { 0x30aa, 0x20 },
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+ { 0x30ac, 0x20 },
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+ { 0x30b0, 0x43 },
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+ { 0x3119, 0x9e },
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+ { 0x311c, 0x1e },
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+ { 0x311e, 0x08 },
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+ { 0x3128, 0x05 },
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+ { 0x313d, 0x83 },
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+ { 0x3150, 0x03 },
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+ { 0x317e, 0x00 },
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+ { 0x32b8, 0x50 },
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+ { 0x32b9, 0x10 },
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+ { 0x32ba, 0x00 },
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+ { 0x32bb, 0x04 },
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+ { 0x32c8, 0x50 },
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+ { 0x32c9, 0x10 },
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+ { 0x32ca, 0x00 },
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+ { 0x32cb, 0x04 },
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+ { 0x332c, 0xd3 },
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+ { 0x332d, 0x10 },
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+ { 0x332e, 0x0d },
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+ { 0x3358, 0x06 },
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+ { 0x3359, 0xe1 },
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+ { 0x335a, 0x11 },
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+ { 0x3360, 0x1e },
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+ { 0x3361, 0x61 },
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+ { 0x3362, 0x10 },
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+ { 0x33b0, 0x50 },
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+ { 0x33b2, 0x1a },
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+ { 0x33b3, 0x04 },
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+};
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+
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+static const struct imx290_regval imx290_1080p_settings[] = {
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+ /* mode settings */
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+ { 0x3007, 0x00 },
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+ { 0x303a, 0x0c },
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+ { 0x3414, 0x0a },
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+ { 0x3472, 0x80 },
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+ { 0x3473, 0x07 },
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+ { 0x3418, 0x38 },
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+ { 0x3419, 0x04 },
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+ { 0x3012, 0x64 },
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+ { 0x3013, 0x00 },
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+ { 0x305c, 0x18 },
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+ { 0x305d, 0x03 },
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+ { 0x305e, 0x20 },
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+ { 0x305f, 0x01 },
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+ { 0x315e, 0x1a },
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+ { 0x3164, 0x1a },
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+ { 0x3480, 0x49 },
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+ /* data rate settings */
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+ { 0x3009, 0x01 },
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+ { 0x3405, 0x10 },
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+ { 0x3446, 0x57 },
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+ { 0x3447, 0x00 },
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+ { 0x3448, 0x37 },
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+ { 0x3449, 0x00 },
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+ { 0x344a, 0x1f },
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+ { 0x344b, 0x00 },
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+ { 0x344c, 0x1f },
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+ { 0x344d, 0x00 },
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+ { 0x344e, 0x1f },
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+ { 0x344f, 0x00 },
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+ { 0x3450, 0x77 },
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+ { 0x3451, 0x00 },
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+ { 0x3452, 0x1f },
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+ { 0x3453, 0x00 },
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+ { 0x3454, 0x17 },
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+ { 0x3455, 0x00 },
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+ { 0x301c, 0x98 },
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+ { 0x301d, 0x08 },
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+};
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+
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+static const struct imx290_regval imx290_720p_settings[] = {
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+ /* mode settings */
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+ { 0x3007, 0x10 },
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+ { 0x303a, 0x06 },
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+ { 0x3414, 0x04 },
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+ { 0x3472, 0x00 },
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+ { 0x3473, 0x05 },
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+ { 0x3418, 0xd0 },
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+ { 0x3419, 0x02 },
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+ { 0x3012, 0x64 },
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+ { 0x3013, 0x00 },
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+ { 0x305c, 0x20 },
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+ { 0x305d, 0x00 },
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+ { 0x305e, 0x20 },
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+ { 0x305f, 0x01 },
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+ { 0x315e, 0x1a },
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+ { 0x3164, 0x1a },
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+ { 0x3480, 0x49 },
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+ /* data rate settings */
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+ { 0x3009, 0x01 },
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+ { 0x3405, 0x10 },
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+ { 0x3446, 0x4f },
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+ { 0x3447, 0x00 },
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+ { 0x3448, 0x2f },
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+ { 0x3449, 0x00 },
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+ { 0x344a, 0x17 },
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+ { 0x344b, 0x00 },
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+ { 0x344c, 0x17 },
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+ { 0x344d, 0x00 },
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+ { 0x344e, 0x17 },
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+ { 0x344f, 0x00 },
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+ { 0x3450, 0x57 },
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+ { 0x3451, 0x00 },
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+ { 0x3452, 0x17 },
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+ { 0x3453, 0x00 },
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+ { 0x3454, 0x17 },
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+ { 0x3455, 0x00 },
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+ { 0x301c, 0xe4 },
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+ { 0x301d, 0x0c },
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+};
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+
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+static const struct imx290_regval imx290_10bit_settings[] = {
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+ { 0x3005, 0x00},
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+ { 0x3046, 0x00},
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+ { 0x3129, 0x1d},
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+ { 0x317c, 0x12},
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+ { 0x31ec, 0x37},
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+ { 0x3441, 0x0a},
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+ { 0x3442, 0x0a},
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+ { 0x300a, 0x3c},
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+ { 0x300b, 0x00},
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+};
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+
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+/* supported link frequencies */
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+static const s64 imx290_link_freq[] = {
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+ IMX290_DEFAULT_LINK_FREQ,
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+};
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+
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+/* Mode configs */
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+static const struct imx290_mode imx290_modes[] = {
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+ {
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+ .width = 1920,
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+ .height = 1080,
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+ .data = imx290_1080p_settings,
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+ .data_size = ARRAY_SIZE(imx290_1080p_settings),
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+ .pixel_rate = 178200000,
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+ .link_freq_index = 0,
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+ },
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+ {
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+ .width = 1280,
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+ .height = 720,
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+ .data = imx290_720p_settings,
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+ .data_size = ARRAY_SIZE(imx290_720p_settings),
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+ .pixel_rate = 178200000,
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+ .link_freq_index = 0,
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+ },
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+};
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+
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+static inline struct imx290 *to_imx290(struct v4l2_subdev *_sd)
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+{
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+ return container_of(_sd, struct imx290, sd);
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+}
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+
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+static inline int imx290_read_reg(struct imx290 *imx290, u16 addr, u8 *value)
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+{
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+ unsigned int regval;
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+ int ret;
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+
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+ ret = regmap_read(imx290->regmap, addr, ®val);
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+ if (ret) {
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+ dev_err(imx290->dev, "I2C read failed for addr: %x\n", addr);
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+ return ret;
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+ }
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+
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+ *value = regval & 0xff;
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+
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+ return 0;
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+}
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+
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+static int imx290_write_reg(struct imx290 *imx290, u16 addr, u8 value)
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+{
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+ int ret;
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+
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+ ret = regmap_write(imx290->regmap, addr, value);
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+ if (ret) {
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+ dev_err(imx290->dev, "I2C write failed for addr: %x\n", addr);
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+ return ret;
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+ }
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+
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+ return ret;
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+}
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+
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+static int imx290_set_register_array(struct imx290 *imx290,
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+ const struct imx290_regval *settings,
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+ unsigned int num_settings)
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+{
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+ unsigned int i;
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+ int ret;
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+
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+ for (i = 0; i < num_settings; ++i, ++settings) {
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+ ret = imx290_write_reg(imx290, settings->reg, settings->val);
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+ if (ret < 0)
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+ return ret;
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+
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+ /* Settle time is 10ms for all registers */
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+ msleep(10);
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+ }
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+
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+ return 0;
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+}
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+
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+static int imx290_write_buffered_reg(struct imx290 *imx290, u16 address_low,
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+ u8 nr_regs, u32 value)
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+{
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+ unsigned int i;
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+ int ret;
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+
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+ ret = imx290_write_reg(imx290, IMX290_REGHOLD, 0x01);
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+ if (ret) {
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+ dev_err(imx290->dev, "Error setting hold register\n");
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+ return ret;
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+ }
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+
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+ for (i = 0; i < nr_regs; i++) {
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+ ret = imx290_write_reg(imx290, address_low + i,
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+ (u8)(value >> (i * 8)));
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+ if (ret) {
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+ dev_err(imx290->dev, "Error writing buffered registers\n");
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+ return ret;
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+ }
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+ }
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+
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+ ret = imx290_write_reg(imx290, IMX290_REGHOLD, 0x00);
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+ if (ret) {
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+ dev_err(imx290->dev, "Error setting hold register\n");
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+ return ret;
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+ }
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+
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+ return ret;
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+}
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+
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+static int imx290_set_gain(struct imx290 *imx290, u32 value)
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+{
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+ int ret;
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+
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+ ret = imx290_write_buffered_reg(imx290, IMX290_GAIN, 1, value);
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+ if (ret)
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+ dev_err(imx290->dev, "Unable to write gain\n");
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+
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+ return ret;
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+}
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+
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+/* Stop streaming */
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+static int imx290_stop_streaming(struct imx290 *imx290)
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+{
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+ int ret;
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+
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+ ret = imx290_write_reg(imx290, IMX290_STANDBY, 0x01);
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+ if (ret < 0)
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+ return ret;
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+
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+ msleep(30);
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+
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+ return imx290_write_reg(imx290, IMX290_XMSTA, 0x01);
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+}
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+
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+static int imx290_set_ctrl(struct v4l2_ctrl *ctrl)
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+{
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+ struct imx290 *imx290 = container_of(ctrl->handler,
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+ struct imx290, ctrls);
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+ int ret = 0;
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+
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+ /* V4L2 controls values will be applied only when power is already up */
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+ if (!pm_runtime_get_if_in_use(imx290->dev))
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+ return 0;
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+
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+ switch (ctrl->id) {
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+ case V4L2_CID_GAIN:
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+ ret = imx290_set_gain(imx290, ctrl->val);
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+ break;
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+ default:
|
|
+ ret = -EINVAL;
|
|
+ break;
|
|
+ }
|
|
+
|
|
+ pm_runtime_put(imx290->dev);
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static const struct v4l2_ctrl_ops imx290_ctrl_ops = {
|
|
+ .s_ctrl = imx290_set_ctrl,
|
|
+};
|
|
+
|
|
+static int imx290_enum_mbus_code(struct v4l2_subdev *sd,
|
|
+ struct v4l2_subdev_pad_config *cfg,
|
|
+ struct v4l2_subdev_mbus_code_enum *code)
|
|
+{
|
|
+ if (code->index >= ARRAY_SIZE(imx290_formats))
|
|
+ return -EINVAL;
|
|
+
|
|
+ code->code = imx290_formats[code->index].code;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int imx290_get_fmt(struct v4l2_subdev *sd,
|
|
+ struct v4l2_subdev_pad_config *cfg,
|
|
+ struct v4l2_subdev_format *fmt)
|
|
+{
|
|
+ struct imx290 *imx290 = to_imx290(sd);
|
|
+ struct v4l2_mbus_framefmt *framefmt;
|
|
+
|
|
+ mutex_lock(&imx290->lock);
|
|
+
|
|
+ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
|
|
+ framefmt = v4l2_subdev_get_try_format(&imx290->sd, cfg,
|
|
+ fmt->pad);
|
|
+ else
|
|
+ framefmt = &imx290->current_format;
|
|
+
|
|
+ fmt->format = *framefmt;
|
|
+
|
|
+ mutex_unlock(&imx290->lock);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int imx290_set_fmt(struct v4l2_subdev *sd,
|
|
+ struct v4l2_subdev_pad_config *cfg,
|
|
+ struct v4l2_subdev_format *fmt)
|
|
+{
|
|
+ struct imx290 *imx290 = to_imx290(sd);
|
|
+ const struct imx290_mode *mode;
|
|
+ struct v4l2_mbus_framefmt *format;
|
|
+ unsigned int i;
|
|
+
|
|
+ mutex_lock(&imx290->lock);
|
|
+
|
|
+ mode = v4l2_find_nearest_size(imx290_modes,
|
|
+ ARRAY_SIZE(imx290_modes),
|
|
+ width, height,
|
|
+ fmt->format.width, fmt->format.height);
|
|
+
|
|
+ fmt->format.width = mode->width;
|
|
+ fmt->format.height = mode->height;
|
|
+
|
|
+ for (i = 0; i < ARRAY_SIZE(imx290_formats); i++)
|
|
+ if (imx290_formats[i].code == fmt->format.code)
|
|
+ break;
|
|
+
|
|
+ if (i >= ARRAY_SIZE(imx290_formats))
|
|
+ i = 0;
|
|
+
|
|
+ fmt->format.code = imx290_formats[i].code;
|
|
+ fmt->format.field = V4L2_FIELD_NONE;
|
|
+
|
|
+ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
|
|
+ format = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
|
|
+ } else {
|
|
+ format = &imx290->current_format;
|
|
+ __v4l2_ctrl_s_ctrl(imx290->link_freq, mode->link_freq_index);
|
|
+ __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate, mode->pixel_rate);
|
|
+
|
|
+ imx290->current_mode = mode;
|
|
+ }
|
|
+
|
|
+ *format = fmt->format;
|
|
+
|
|
+ mutex_unlock(&imx290->lock);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int imx290_entity_init_cfg(struct v4l2_subdev *subdev,
|
|
+ struct v4l2_subdev_pad_config *cfg)
|
|
+{
|
|
+ struct v4l2_subdev_format fmt = { 0 };
|
|
+
|
|
+ fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
|
|
+ fmt.format.width = 1920;
|
|
+ fmt.format.height = 1080;
|
|
+
|
|
+ imx290_set_fmt(subdev, cfg, &fmt);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int imx290_write_current_format(struct imx290 *imx290,
|
|
+ struct v4l2_mbus_framefmt *format)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ switch (format->code) {
|
|
+ case MEDIA_BUS_FMT_SRGGB10_1X10:
|
|
+ ret = imx290_set_register_array(imx290, imx290_10bit_settings,
|
|
+ ARRAY_SIZE(
|
|
+ imx290_10bit_settings));
|
|
+ if (ret < 0) {
|
|
+ dev_err(imx290->dev, "Could not set format registers\n");
|
|
+ return ret;
|
|
+ }
|
|
+ break;
|
|
+ default:
|
|
+ dev_err(imx290->dev, "Unknown pixel format\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/* Start streaming */
|
|
+static int imx290_start_streaming(struct imx290 *imx290)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ /* Set init register settings */
|
|
+ ret = imx290_set_register_array(imx290, imx290_global_init_settings,
|
|
+ ARRAY_SIZE(
|
|
+ imx290_global_init_settings));
|
|
+ if (ret < 0) {
|
|
+ dev_err(imx290->dev, "Could not set init registers\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ /* Set current frame format */
|
|
+ ret = imx290_write_current_format(imx290, &imx290->current_format);
|
|
+ if (ret < 0) {
|
|
+ dev_err(imx290->dev, "Could not set frame format\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ /* Apply default values of current mode */
|
|
+ ret = imx290_set_register_array(imx290, imx290->current_mode->data,
|
|
+ imx290->current_mode->data_size);
|
|
+ if (ret < 0) {
|
|
+ dev_err(imx290->dev, "Could not set current mode\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ /* Apply customized values from user */
|
|
+ ret = v4l2_ctrl_handler_setup(imx290->sd.ctrl_handler);
|
|
+ if (ret) {
|
|
+ dev_err(imx290->dev, "Could not sync v4l2 controls\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ ret = imx290_write_reg(imx290, IMX290_STANDBY, 0x00);
|
|
+ if (ret < 0)
|
|
+ return ret;
|
|
+
|
|
+ msleep(30);
|
|
+
|
|
+ /* Start streaming */
|
|
+ return imx290_write_reg(imx290, IMX290_XMSTA, 0x00);
|
|
+}
|
|
+
|
|
+static int imx290_set_stream(struct v4l2_subdev *sd, int enable)
|
|
+{
|
|
+ struct imx290 *imx290 = to_imx290(sd);
|
|
+ int ret = 0;
|
|
+
|
|
+ if (enable) {
|
|
+ ret = pm_runtime_get_sync(imx290->dev);
|
|
+ if (ret < 0) {
|
|
+ pm_runtime_put_noidle(imx290->dev);
|
|
+ goto unlock_and_return;
|
|
+ }
|
|
+
|
|
+ ret = imx290_start_streaming(imx290);
|
|
+ if (ret) {
|
|
+ dev_err(imx290->dev, "Start stream failed\n");
|
|
+ pm_runtime_put(imx290->dev);
|
|
+ goto unlock_and_return;
|
|
+ }
|
|
+ } else {
|
|
+ imx290_stop_streaming(imx290);
|
|
+ pm_runtime_put(imx290->dev);
|
|
+ }
|
|
+
|
|
+unlock_and_return:
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static int imx290_get_regulators(struct device *dev, struct imx290 *imx290)
|
|
+{
|
|
+ unsigned int i;
|
|
+
|
|
+ for (i = 0; i < IMX290_NUM_SUPPLIES; i++)
|
|
+ imx290->supplies[i].supply = imx290_supply_name[i];
|
|
+
|
|
+ return devm_regulator_bulk_get(dev, IMX290_NUM_SUPPLIES,
|
|
+ imx290->supplies);
|
|
+}
|
|
+
|
|
+static int imx290_power_on(struct device *dev)
|
|
+{
|
|
+ struct i2c_client *client = to_i2c_client(dev);
|
|
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
+ struct imx290 *imx290 = to_imx290(sd);
|
|
+ int ret;
|
|
+
|
|
+ ret = clk_prepare_enable(imx290->xclk);
|
|
+ if (ret) {
|
|
+ dev_err(imx290->dev, "Failed to enable clock\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ ret = regulator_bulk_enable(IMX290_NUM_SUPPLIES, imx290->supplies);
|
|
+ if (ret) {
|
|
+ dev_err(imx290->dev, "Failed to enable regulators\n");
|
|
+ clk_disable_unprepare(imx290->xclk);
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ usleep_range(1, 2);
|
|
+ gpiod_set_value_cansleep(imx290->rst_gpio, 1);
|
|
+ usleep_range(30000, 31000);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int imx290_power_off(struct device *dev)
|
|
+{
|
|
+ struct i2c_client *client = to_i2c_client(dev);
|
|
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
+ struct imx290 *imx290 = to_imx290(sd);
|
|
+
|
|
+ clk_disable_unprepare(imx290->xclk);
|
|
+ gpiod_set_value_cansleep(imx290->rst_gpio, 0);
|
|
+ regulator_bulk_disable(IMX290_NUM_SUPPLIES, imx290->supplies);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct dev_pm_ops imx290_pm_ops = {
|
|
+ SET_RUNTIME_PM_OPS(imx290_power_on, imx290_power_off, NULL)
|
|
+};
|
|
+
|
|
+static const struct v4l2_subdev_video_ops imx290_video_ops = {
|
|
+ .s_stream = imx290_set_stream,
|
|
+};
|
|
+
|
|
+static const struct v4l2_subdev_pad_ops imx290_pad_ops = {
|
|
+ .init_cfg = imx290_entity_init_cfg,
|
|
+ .enum_mbus_code = imx290_enum_mbus_code,
|
|
+ .get_fmt = imx290_get_fmt,
|
|
+ .set_fmt = imx290_set_fmt,
|
|
+};
|
|
+
|
|
+static const struct v4l2_subdev_ops imx290_subdev_ops = {
|
|
+ .video = &imx290_video_ops,
|
|
+ .pad = &imx290_pad_ops,
|
|
+};
|
|
+
|
|
+static const struct media_entity_operations imx290_subdev_entity_ops = {
|
|
+ .link_validate = v4l2_subdev_link_validate,
|
|
+};
|
|
+
|
|
+static int imx290_probe(struct i2c_client *client)
|
|
+{
|
|
+ struct device *dev = &client->dev;
|
|
+ struct fwnode_handle *endpoint;
|
|
+ struct imx290 *imx290;
|
|
+ u32 xclk_freq;
|
|
+ int ret;
|
|
+
|
|
+ imx290 = devm_kzalloc(dev, sizeof(*imx290), GFP_KERNEL);
|
|
+ if (!imx290)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ imx290->dev = dev;
|
|
+ imx290->regmap = devm_regmap_init_i2c(client, &imx290_regmap_config);
|
|
+ if (IS_ERR(imx290->regmap)) {
|
|
+ dev_err(dev, "Unable to initialize I2C\n");
|
|
+ return -ENODEV;
|
|
+ }
|
|
+
|
|
+ endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
|
|
+ if (!endpoint) {
|
|
+ dev_err(dev, "Endpoint node not found\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &imx290->ep);
|
|
+ fwnode_handle_put(endpoint);
|
|
+ if (ret) {
|
|
+ dev_err(dev, "Parsing endpoint node failed\n");
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ if (!imx290->ep.nr_of_link_frequencies) {
|
|
+ dev_err(dev, "link-frequency property not found in DT\n");
|
|
+ ret = -EINVAL;
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ if (imx290->ep.link_frequencies[0] != IMX290_DEFAULT_LINK_FREQ) {
|
|
+ dev_err(dev, "Unsupported link frequency\n");
|
|
+ ret = -EINVAL;
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ /* Only CSI2 is supported for now */
|
|
+ if (imx290->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
|
|
+ dev_err(dev, "Unsupported bus type, should be CSI2\n");
|
|
+ ret = -EINVAL;
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ /* Set default mode to max resolution */
|
|
+ imx290->current_mode = &imx290_modes[0];
|
|
+
|
|
+ /* get system clock (xclk) */
|
|
+ imx290->xclk = devm_clk_get(dev, "xclk");
|
|
+ if (IS_ERR(imx290->xclk)) {
|
|
+ dev_err(dev, "Could not get xclk");
|
|
+ ret = PTR_ERR(imx290->xclk);
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
|
|
+ &xclk_freq);
|
|
+ if (ret) {
|
|
+ dev_err(dev, "Could not get xclk frequency\n");
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ /* external clock must be 37.125 MHz */
|
|
+ if (xclk_freq != 37125000) {
|
|
+ dev_err(dev, "External clock frequency %u is not supported\n",
|
|
+ xclk_freq);
|
|
+ ret = -EINVAL;
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ ret = clk_set_rate(imx290->xclk, xclk_freq);
|
|
+ if (ret) {
|
|
+ dev_err(dev, "Could not set xclk frequency\n");
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ ret = imx290_get_regulators(dev, imx290);
|
|
+ if (ret < 0) {
|
|
+ dev_err(dev, "Cannot get regulators\n");
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ imx290->rst_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
|
|
+ if (IS_ERR(imx290->rst_gpio)) {
|
|
+ dev_err(dev, "Cannot get reset gpio\n");
|
|
+ ret = PTR_ERR(imx290->rst_gpio);
|
|
+ goto free_err;
|
|
+ }
|
|
+
|
|
+ mutex_init(&imx290->lock);
|
|
+
|
|
+ v4l2_ctrl_handler_init(&imx290->ctrls, 3);
|
|
+
|
|
+ v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
|
|
+ V4L2_CID_GAIN, 0, 72, 1, 0);
|
|
+ imx290->link_freq =
|
|
+ v4l2_ctrl_new_int_menu(&imx290->ctrls,
|
|
+ &imx290_ctrl_ops,
|
|
+ V4L2_CID_LINK_FREQ,
|
|
+ ARRAY_SIZE(imx290_link_freq) - 1,
|
|
+ 0, imx290_link_freq);
|
|
+ if (imx290->link_freq)
|
|
+ imx290->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
+
|
|
+ imx290->pixel_rate = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
|
|
+ V4L2_CID_PIXEL_RATE, 1,
|
|
+ INT_MAX, 1,
|
|
+ imx290_modes[0].pixel_rate);
|
|
+
|
|
+ imx290->sd.ctrl_handler = &imx290->ctrls;
|
|
+
|
|
+ if (imx290->ctrls.error) {
|
|
+ dev_err(dev, "Control initialization error %d\n",
|
|
+ imx290->ctrls.error);
|
|
+ ret = imx290->ctrls.error;
|
|
+ goto free_ctrl;
|
|
+ }
|
|
+
|
|
+ v4l2_i2c_subdev_init(&imx290->sd, client, &imx290_subdev_ops);
|
|
+ imx290->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
|
|
+ imx290->sd.dev = &client->dev;
|
|
+ imx290->sd.entity.ops = &imx290_subdev_entity_ops;
|
|
+ imx290->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
|
|
+
|
|
+ imx290->pad.flags = MEDIA_PAD_FL_SOURCE;
|
|
+ ret = media_entity_pads_init(&imx290->sd.entity, 1, &imx290->pad);
|
|
+ if (ret < 0) {
|
|
+ dev_err(dev, "Could not register media entity\n");
|
|
+ goto free_ctrl;
|
|
+ }
|
|
+
|
|
+ ret = v4l2_async_register_subdev(&imx290->sd);
|
|
+ if (ret < 0) {
|
|
+ dev_err(dev, "Could not register v4l2 device\n");
|
|
+ goto free_entity;
|
|
+ }
|
|
+
|
|
+ /* Power on the device to match runtime PM state below */
|
|
+ ret = imx290_power_on(dev);
|
|
+ if (ret < 0) {
|
|
+ dev_err(dev, "Could not power on the device\n");
|
|
+ goto free_entity;
|
|
+ }
|
|
+
|
|
+ pm_runtime_set_active(dev);
|
|
+ pm_runtime_enable(dev);
|
|
+ pm_runtime_idle(dev);
|
|
+
|
|
+ v4l2_fwnode_endpoint_free(&imx290->ep);
|
|
+
|
|
+ return 0;
|
|
+
|
|
+free_entity:
|
|
+ media_entity_cleanup(&imx290->sd.entity);
|
|
+free_ctrl:
|
|
+ v4l2_ctrl_handler_free(&imx290->ctrls);
|
|
+ mutex_destroy(&imx290->lock);
|
|
+free_err:
|
|
+ v4l2_fwnode_endpoint_free(&imx290->ep);
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static int imx290_remove(struct i2c_client *client)
|
|
+{
|
|
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
+ struct imx290 *imx290 = to_imx290(sd);
|
|
+
|
|
+ v4l2_async_unregister_subdev(sd);
|
|
+ media_entity_cleanup(&sd->entity);
|
|
+ v4l2_ctrl_handler_free(sd->ctrl_handler);
|
|
+
|
|
+ mutex_destroy(&imx290->lock);
|
|
+
|
|
+ pm_runtime_disable(imx290->dev);
|
|
+ if (!pm_runtime_status_suspended(imx290->dev))
|
|
+ imx290_power_off(imx290->dev);
|
|
+ pm_runtime_set_suspended(imx290->dev);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct of_device_id imx290_of_match[] = {
|
|
+ { .compatible = "sony,imx290" },
|
|
+ { /* sentinel */ }
|
|
+};
|
|
+MODULE_DEVICE_TABLE(of, imx290_of_match);
|
|
+
|
|
+static struct i2c_driver imx290_i2c_driver = {
|
|
+ .probe_new = imx290_probe,
|
|
+ .remove = imx290_remove,
|
|
+ .driver = {
|
|
+ .name = "imx290",
|
|
+ .pm = &imx290_pm_ops,
|
|
+ .of_match_table = of_match_ptr(imx290_of_match),
|
|
+ },
|
|
+};
|
|
+
|
|
+module_i2c_driver(imx290_i2c_driver);
|
|
+
|
|
+MODULE_DESCRIPTION("Sony IMX290 CMOS Image Sensor Driver");
|
|
+MODULE_AUTHOR("FRAMOS GmbH");
|
|
+MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
|
|
+MODULE_LICENSE("GPL v2");
|