mirror of
https://github.com/openwrt/openwrt.git
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cf08db988b
Backport initial LEDs hw control support. Currently this is limited to
only rx/tx and link events for the netdev trigger but the API got
accepted and the additional modes are working on and will be backported
later.
Refresh every patch and add the additional config flag for QCA8K new
LEDs support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 0a4b309f41)
70 lines
2.3 KiB
Diff
70 lines
2.3 KiB
Diff
From 157ac9f52fd9b9a22cf12f7755a905fb34ef72f7 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <j4g8y7@gmail.com>
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Date: Fri, 25 Dec 2020 08:02:47 +0100
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Subject: [PATCH] net: phy: define PSGMII PHY interface mode
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The PSGMII interface is similar to QSGMII. The main difference
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is that the PSGMII interface combines five SGMII lines into a
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single link while in QSGMII only four lines are combined.
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Similarly to the QSGMII, this interface mode might also needs
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special handling within the MAC driver.
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Add definitions for the PHY layer to allow to express this type
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of connection between the MAC and PHY.
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Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
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---
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Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
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drivers/net/phy/phylink.c | 2 ++
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include/linux/phy.h | 3 +++
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3 files changed, 6 insertions(+)
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--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
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+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
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@@ -64,6 +64,7 @@ properties:
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- mii
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- gmii
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- sgmii
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+ - psgmii
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- qsgmii
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- tbi
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- rev-mii
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--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -366,6 +366,7 @@ void phylink_get_linkmodes(unsigned long
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII:
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+ case PHY_INTERFACE_MODE_PSGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_GMII:
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@@ -629,6 +630,7 @@ static int phylink_parse_mode(struct phy
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switch (pl->link_config.interface) {
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case PHY_INTERFACE_MODE_SGMII:
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+ case PHY_INTERFACE_MODE_PSGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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phylink_set(pl->supported, 10baseT_Half);
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phylink_set(pl->supported, 10baseT_Full);
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--- a/include/linux/phy.h
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+++ b/include/linux/phy.h
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@@ -139,6 +139,7 @@ typedef enum {
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PHY_INTERFACE_MODE_XGMII,
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PHY_INTERFACE_MODE_XLGMII,
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PHY_INTERFACE_MODE_MOCA,
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+ PHY_INTERFACE_MODE_PSGMII,
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PHY_INTERFACE_MODE_QSGMII,
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PHY_INTERFACE_MODE_TRGMII,
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PHY_INTERFACE_MODE_100BASEX,
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@@ -244,6 +245,8 @@ static inline const char *phy_modes(phy_
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return "xlgmii";
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case PHY_INTERFACE_MODE_MOCA:
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return "moca";
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+ case PHY_INTERFACE_MODE_PSGMII:
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+ return "psgmii";
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case PHY_INTERFACE_MODE_QSGMII:
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return "qsgmii";
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case PHY_INTERFACE_MODE_TRGMII:
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