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e2e2fc3cd0
Add updated patches for 6.6. DMA/cache-handling patches have been reworked / backported from upstream. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
126 lines
4.0 KiB
Diff
126 lines
4.0 KiB
Diff
From 922b213ad22f93fb2788ce119084622ab3d25bf8 Mon Sep 17 00:00:00 2001
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From: Herbert Xu <herbert@gondor.apana.org.au>
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Date: Thu, 30 Nov 2023 18:12:55 +0800
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Subject: [PATCH 012/116] crypto: starfive - Remove cfb and ofb
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Remove the unused CFB/OFB implementation.
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Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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---
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drivers/crypto/starfive/jh7110-aes.c | 71 +--------------------------
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drivers/crypto/starfive/jh7110-cryp.h | 2 -
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2 files changed, 1 insertion(+), 72 deletions(-)
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--- a/drivers/crypto/starfive/jh7110-aes.c
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+++ b/drivers/crypto/starfive/jh7110-aes.c
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@@ -262,12 +262,7 @@ static int starfive_aes_hw_init(struct s
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rctx->csr.aes.mode = hw_mode;
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rctx->csr.aes.cmode = !is_encrypt(cryp);
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rctx->csr.aes.ie = 1;
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-
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- if (hw_mode == STARFIVE_AES_MODE_CFB ||
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- hw_mode == STARFIVE_AES_MODE_OFB)
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- rctx->csr.aes.stmode = STARFIVE_AES_MODE_XFB_128;
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- else
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- rctx->csr.aes.stmode = STARFIVE_AES_MODE_XFB_1;
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+ rctx->csr.aes.stmode = STARFIVE_AES_MODE_XFB_1;
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if (cryp->side_chan) {
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rctx->csr.aes.delay_aes = 1;
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@@ -294,8 +289,6 @@ static int starfive_aes_hw_init(struct s
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starfive_aes_ccm_init(ctx);
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starfive_aes_aead_hw_start(ctx, hw_mode);
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break;
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- case STARFIVE_AES_MODE_OFB:
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- case STARFIVE_AES_MODE_CFB:
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case STARFIVE_AES_MODE_CBC:
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case STARFIVE_AES_MODE_CTR:
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starfive_aes_write_iv(ctx, (void *)cryp->req.sreq->iv);
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@@ -785,26 +778,6 @@ static int starfive_aes_cbc_decrypt(stru
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return starfive_aes_crypt(req, STARFIVE_AES_MODE_CBC);
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}
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-static int starfive_aes_cfb_encrypt(struct skcipher_request *req)
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-{
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- return starfive_aes_crypt(req, STARFIVE_AES_MODE_CFB | FLG_ENCRYPT);
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-}
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-
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-static int starfive_aes_cfb_decrypt(struct skcipher_request *req)
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-{
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- return starfive_aes_crypt(req, STARFIVE_AES_MODE_CFB);
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-}
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-
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-static int starfive_aes_ofb_encrypt(struct skcipher_request *req)
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-{
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- return starfive_aes_crypt(req, STARFIVE_AES_MODE_OFB | FLG_ENCRYPT);
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-}
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-
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-static int starfive_aes_ofb_decrypt(struct skcipher_request *req)
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-{
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- return starfive_aes_crypt(req, STARFIVE_AES_MODE_OFB);
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-}
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-
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static int starfive_aes_ctr_encrypt(struct skcipher_request *req)
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{
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return starfive_aes_crypt(req, STARFIVE_AES_MODE_CTR | FLG_ENCRYPT);
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@@ -903,48 +876,6 @@ static struct skcipher_engine_alg skciph
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.cra_priority = 200,
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.cra_flags = CRYPTO_ALG_ASYNC,
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.cra_blocksize = 1,
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- .cra_ctxsize = sizeof(struct starfive_cryp_ctx),
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- .cra_alignmask = 0xf,
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- .cra_module = THIS_MODULE,
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- },
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- .op = {
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- .do_one_request = starfive_aes_do_one_req,
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- },
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-}, {
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- .base.init = starfive_aes_init_tfm,
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- .base.setkey = starfive_aes_setkey,
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- .base.encrypt = starfive_aes_cfb_encrypt,
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- .base.decrypt = starfive_aes_cfb_decrypt,
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- .base.min_keysize = AES_MIN_KEY_SIZE,
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- .base.max_keysize = AES_MAX_KEY_SIZE,
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- .base.ivsize = AES_BLOCK_SIZE,
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- .base.base = {
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- .cra_name = "cfb(aes)",
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- .cra_driver_name = "starfive-cfb-aes",
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- .cra_priority = 200,
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- .cra_flags = CRYPTO_ALG_ASYNC,
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- .cra_blocksize = 1,
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- .cra_ctxsize = sizeof(struct starfive_cryp_ctx),
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- .cra_alignmask = 0xf,
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- .cra_module = THIS_MODULE,
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- },
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- .op = {
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- .do_one_request = starfive_aes_do_one_req,
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- },
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-}, {
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- .base.init = starfive_aes_init_tfm,
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- .base.setkey = starfive_aes_setkey,
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- .base.encrypt = starfive_aes_ofb_encrypt,
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- .base.decrypt = starfive_aes_ofb_decrypt,
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- .base.min_keysize = AES_MIN_KEY_SIZE,
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- .base.max_keysize = AES_MAX_KEY_SIZE,
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- .base.ivsize = AES_BLOCK_SIZE,
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- .base.base = {
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- .cra_name = "ofb(aes)",
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- .cra_driver_name = "starfive-ofb-aes",
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- .cra_priority = 200,
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- .cra_flags = CRYPTO_ALG_ASYNC,
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- .cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct starfive_cryp_ctx),
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.cra_alignmask = 0xf,
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.cra_module = THIS_MODULE,
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--- a/drivers/crypto/starfive/jh7110-cryp.h
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+++ b/drivers/crypto/starfive/jh7110-cryp.h
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@@ -50,8 +50,6 @@ union starfive_aes_csr {
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u32 ccm_start :1;
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#define STARFIVE_AES_MODE_ECB 0x0
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#define STARFIVE_AES_MODE_CBC 0x1
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-#define STARFIVE_AES_MODE_CFB 0x2
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-#define STARFIVE_AES_MODE_OFB 0x3
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#define STARFIVE_AES_MODE_CTR 0x4
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#define STARFIVE_AES_MODE_CCM 0x5
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#define STARFIVE_AES_MODE_GCM 0x6
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