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e2e2fc3cd0
Add updated patches for 6.6. DMA/cache-handling patches have been reworked / backported from upstream. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
140 lines
3.7 KiB
Diff
140 lines
3.7 KiB
Diff
From fc86405992c37b1898fd9b9bc077be673d774269 Mon Sep 17 00:00:00 2001
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From: Hal Feng <hal.feng@starfivetech.com>
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Date: Fri, 22 Mar 2024 09:54:28 +0800
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Subject: [PATCH 111/116] riscv: dts: starfive: Add vf2-overlay dtso subdir
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Create subdir vf2-overlay/ and add overlay .dtso for VF2 board.
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The code is ported from tag JH7110_VF2_6.1_v5.11.4
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Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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---
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arch/riscv/boot/dts/starfive/Makefile | 1 +
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.../boot/dts/starfive/vf2-overlay/Makefile | 3 +
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.../starfive/vf2-overlay/vf2-overlay-can.dtso | 23 ++++++
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.../vf2-overlay/vf2-overlay-uart3-i2c.dtso | 75 +++++++++++++++++++
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4 files changed, 102 insertions(+)
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create mode 100644 arch/riscv/boot/dts/starfive/vf2-overlay/Makefile
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create mode 100644 arch/riscv/boot/dts/starfive/vf2-overlay/vf2-overlay-can.dtso
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create mode 100644 arch/riscv/boot/dts/starfive/vf2-overlay/vf2-overlay-uart3-i2c.dtso
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--- a/arch/riscv/boot/dts/starfive/Makefile
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+++ b/arch/riscv/boot/dts/starfive/Makefile
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@@ -9,6 +9,7 @@ DTC_FLAGS_jh7110-evb := -@
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
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+subdir-y += vf2-overlay
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb \
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jh7110-starfive-visionfive-2-ac108.dtb \
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--- /dev/null
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+++ b/arch/riscv/boot/dts/starfive/vf2-overlay/Makefile
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@@ -0,0 +1,3 @@
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+# SPDX-License-Identifier: GPL-2.0
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+dtb-$(CONFIG_ARCH_STARFIVE) += vf2-overlay-uart3-i2c.dtbo \
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+ vf2-overlay-can.dtbo
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--- /dev/null
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+++ b/arch/riscv/boot/dts/starfive/vf2-overlay/vf2-overlay-can.dtso
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@@ -0,0 +1,23 @@
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+/dts-v1/;
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+/plugin/;
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+#include <dt-bindings/gpio/gpio.h>
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+#include "../jh7110-pinfunc.h"
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+/ {
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+ compatible = "starfive,jh7110";
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+
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+ //can0
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+ fragment@0 {
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+ target-path = "/soc/can@130d0000";
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+
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+ //can1
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+ fragment@1 {
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+ target-path = "/soc/can@130e0000";
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+};
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--- /dev/null
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+++ b/arch/riscv/boot/dts/starfive/vf2-overlay/vf2-overlay-uart3-i2c.dtso
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@@ -0,0 +1,75 @@
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+/dts-v1/;
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+/plugin/;
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+#include <dt-bindings/gpio/gpio.h>
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+#include "../jh7110-pinfunc.h"
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+/ {
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+ compatible = "starfive,jh7110";
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+
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+ //sysgpio
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+ fragment@0 {
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+ target-path = "/soc/pinctrl@13040000";
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+ __overlay__ {
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+ dt_uart3_pins: dt-uart3-0 {
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+ tx-pins {
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+ pinmux = <GPIOMUX(60, GPOUT_SYS_UART3_TX,
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+ GPOEN_ENABLE,
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+ GPI_NONE)>;
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+ bias-disable;
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+ drive-strength = <12>;
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+ input-disable;
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+ input-schmitt-disable;
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+ slew-rate = <0>;
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+ };
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+
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+ rx-pins {
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+ pinmux = <GPIOMUX(63, GPOUT_LOW,
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+ GPOEN_DISABLE,
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+ GPI_SYS_UART3_RX)>;
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+ bias-pull-up;
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+ drive-strength = <2>;
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+ input-enable;
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+ input-schmitt-enable;
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+ slew-rate = <0>;
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+ };
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+ };
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+
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+ dt_i2c1_pins: dt-i2c1-0 {
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+ i2c-pins {
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+ pinmux = <GPIOMUX(42, GPOUT_LOW,
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+ GPOEN_SYS_I2C1_CLK,
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+ GPI_SYS_I2C1_CLK)>,
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+ <GPIOMUX(43, GPOUT_LOW,
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+ GPOEN_SYS_I2C1_DATA,
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+ GPI_SYS_I2C1_DATA)>;
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+ bias-pull-up;
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+ input-enable;
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+ input-schmitt-enable;
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+ };
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+ };
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+ };
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+ };
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+
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+ //uart3
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+ fragment@1 {
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+ target-path = "/soc/serial@12000000";
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+ __overlay__ {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&dt_uart3_pins>;
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+ status = "okay";
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+ };
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+ };
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+
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+ //i2c1
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+ fragment@2 {
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+ target-path = "/soc/i2c@10040000";
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+ __overlay__ {
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+ clock-frequency = <100000>;
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+ i2c-sda-hold-time-ns = <300>;
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+ i2c-sda-falling-time-ns = <510>;
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+ i2c-scl-falling-time-ns = <510>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&dt_i2c1_pins>;
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+ status = "okay";
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+ };
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+ };
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+};
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