mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 00:41:17 +00:00
5ca8a4a03a
Backport patch that fixes memory disclosure in packet padding. The downstream driver supports statistics, so when a packet cannot be padded the statistics of dropped packets are incremented. The other patches do not introduce any functional changes. Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Link: https://github.com/openwrt/openwrt/pull/16563 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
52 lines
1.7 KiB
Diff
52 lines
1.7 KiB
Diff
From 9c7a86c935074525f24cc20e78a7d5150e4600e3 Mon Sep 17 00:00:00 2001
|
|
From: Hauke Mehrtens <hauke@hauke-m.de>
|
|
Date: Tue, 9 Jul 2024 00:23:04 +0200
|
|
Subject: [PATCH] MIPS: lantiq: improve USB initialization
|
|
|
|
This adds code to initialize the USB controller and PHY also on Danube,
|
|
Amazon SE and AR10. This code is based on the Vendor driver from
|
|
different UGW versions and compared to the hardware documentation.
|
|
|
|
This patch is included in OpenWrt for many years.
|
|
|
|
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
|
---
|
|
arch/mips/lantiq/xway/sysctrl.c | 20 ++++++++++++++++++++
|
|
1 file changed, 20 insertions(+)
|
|
|
|
--- a/arch/mips/lantiq/xway/sysctrl.c
|
|
+++ b/arch/mips/lantiq/xway/sysctrl.c
|
|
@@ -247,6 +247,25 @@ static void pmu_disable(struct clk *clk)
|
|
pr_warn("deactivating PMU module failed!");
|
|
}
|
|
|
|
+static void usb_set_clock(void)
|
|
+{
|
|
+ unsigned int val = ltq_cgu_r32(ifccr);
|
|
+
|
|
+ if (of_machine_is_compatible("lantiq,ar10") ||
|
|
+ of_machine_is_compatible("lantiq,grx390")) {
|
|
+ val &= ~0x03; /* XTAL divided by 3 */
|
|
+ } else if (of_machine_is_compatible("lantiq,ar9") ||
|
|
+ of_machine_is_compatible("lantiq,vr9")) {
|
|
+ /* TODO: this depends on the XTAL frequency */
|
|
+ val |= 0x03; /* XTAL divided by 3 */
|
|
+ } else if (of_machine_is_compatible("lantiq,ase")) {
|
|
+ val |= 0x20; /* from XTAL */
|
|
+ } else if (of_machine_is_compatible("lantiq,danube")) {
|
|
+ val |= 0x30; /* 12 MHz, generated from 36 MHz */
|
|
+ }
|
|
+ ltq_cgu_w32(val, ifccr);
|
|
+}
|
|
+
|
|
/* the pci enable helper */
|
|
static int pci_enable(struct clk *clk)
|
|
{
|
|
@@ -588,4 +607,5 @@ void __init ltq_soc_init(void)
|
|
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
|
|
clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0);
|
|
}
|
|
+ usb_set_clock();
|
|
}
|