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b4ed8a9275
Removed upstreamed: generic/backport-5.4/070-v5.5-MIPS-BPF-Restore-MIPS32-cBPF-JIT.patch All others updated automatically. Compile-tested on: lantiq/xrx200, armvirt/64 Runtime-tested on: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
44 lines
1.2 KiB
Diff
44 lines
1.2 KiB
Diff
From e0afa16cad94b26e13d673647b781dd336cb30bc Mon Sep 17 00:00:00 2001
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From: Wen He <wen.he_1@nxp.com>
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Date: Mon, 14 Oct 2019 14:25:42 +0800
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Subject: [PATCH] arm64: dts: ls1028a: Add properties for HD Display controller
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node
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The HD Display controller includes DP TX CTRL and DPHY, their offers
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multi-protocol support of standards such as DisplayPort and eDP, with
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one of these standards supported at a time.
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This patch enables the HD Display controller driver on the LS1028A.
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Signed-off-by: Wen He <wen.he_1@nxp.com>
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---
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arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 16 ++++++++++++++++
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1 file changed, 16 insertions(+)
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
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@@ -874,7 +874,23 @@
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port {
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dp0_out: endpoint {
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+ remote-endpoint = <&dp1_out>;
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+ };
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+ };
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+ };
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+ hdptx0: display@f200000 {
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+ compatible = "cdn,ls1028a-dp";
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+ reg = <0x0 0xf200000 0x0 0xfffff>;
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+ interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clockgen 2 2>, <&clockgen 2 2>, <&clockgen 2 2>,
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+ <&clockgen 2 2>, <&clockgen 2 2>, <&dpclk>;
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+ clock-names = "clk_core", "pclk", "sclk",
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+ "cclk", "clk_vif", "clk_pxl";
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+
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+ port {
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+ dp1_out: endpoint {
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+ remote-endpoint = <&dp0_out>;
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};
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};
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};
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