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75 lines
1.7 KiB
Diff
75 lines
1.7 KiB
Diff
From f8d0939eca47f56449ec583810a6ff41a1caaa91 Mon Sep 17 00:00:00 2001
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From: Thomas Pedersen <twp@codeaurora.org>
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Date: Mon, 16 May 2016 17:58:54 -0700
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Subject: [PATCH 05/37] arm: qcom: dts: Enable NAND node on IPQ8064 AP148
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platform
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Original patch by Archit Taneja.
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Enable the NAND controller node on the AP148 platform. Provide pinmux
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information.
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Signed-off-by: Archit Taneja <architt@codeaurora.org>
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Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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---
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arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 42 ++++++++++++++++++++++++++++++
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1 file changed, 42 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -38,6 +38,28 @@
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bias-none;
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};
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};
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+ nand_pins: nand_pins {
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+ mux {
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+ pins = "gpio34", "gpio35", "gpio36",
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+ "gpio37", "gpio38", "gpio39",
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+ "gpio40", "gpio41", "gpio42",
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+ "gpio43", "gpio44", "gpio45",
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+ "gpio46", "gpio47";
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+ function = "nand";
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+ drive-strength = <10>;
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+ bias-disable;
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+ };
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+ pullups {
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+ pins = "gpio39";
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+ bias-pull-up;
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+ };
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+ hold {
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+ pins = "gpio40", "gpio41", "gpio42",
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+ "gpio43", "gpio44", "gpio45",
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+ "gpio46", "gpio47";
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+ bias-bus-hold;
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+ };
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+ };
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};
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gsbi@16300000 {
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@@ -98,5 +120,25 @@
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ports-implemented = <0x1>;
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status = "ok";
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};
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+
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+ nand@1ac00000 {
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+ status = "ok";
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+
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+ pinctrl-0 = <&nand_pins>;
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+ pinctrl-names = "default";
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+
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+ nandcs@0 {
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+ compatible = "qcom,nandcs";
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+ reg = <0>;
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+
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+ nand-ecc-strength = <4>;
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+ nand-ecc-step-size = <512>;
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+ nand-bus-width = <8>;
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+ };
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+ };
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};
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};
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+
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+&adm_dma {
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+ status = "ok";
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+};
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