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114 lines
3.9 KiB
Diff
114 lines
3.9 KiB
Diff
From 50dfe70fe9e216cf356830194630f9a39e498d76 Mon Sep 17 00:00:00 2001
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From: Anton Vorontsov <avorontsov@ru.mvista.com>
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Date: Tue, 22 Sep 2009 16:45:14 -0700
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Subject: [PATCH] powerpc: introduce and document sdhci,wp-inverted property for eSDHC
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eSDHC block in MPC837x SOCs reports inverted write-protect state, soon
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sdhci-of driver will look for sdhci,wp-inverted properties to decide
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whether apply a specific quirk.
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So, document the property and add it to device tree source files.
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Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
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Cc: Pierre Ossman <pierre@ossman.eu>
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Cc: Kumar Gala <galak@kernel.crashing.org>
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Cc: David Vrabel <david.vrabel@csr.com>
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Cc: Ben Dooks <ben@fluff.org>
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Cc: Sascha Hauer <s.hauer@pengutronix.de>
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Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Cc: <linux-mmc@vger.kernel.org>
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Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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---
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Documentation/powerpc/dts-bindings/fsl/esdhc.txt | 2 ++
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arch/powerpc/boot/dts/mpc8377_mds.dts | 1 +
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arch/powerpc/boot/dts/mpc8377_rdb.dts | 1 +
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arch/powerpc/boot/dts/mpc8377_wlan.dts | 1 +
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arch/powerpc/boot/dts/mpc8378_mds.dts | 1 +
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arch/powerpc/boot/dts/mpc8378_rdb.dts | 1 +
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arch/powerpc/boot/dts/mpc8379_mds.dts | 1 +
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arch/powerpc/boot/dts/mpc8379_rdb.dts | 1 +
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8 files changed, 9 insertions(+), 0 deletions(-)
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--- a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
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+++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
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@@ -10,6 +10,8 @@ Required properties:
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- interrupts : should contain eSDHC interrupt.
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- interrupt-parent : interrupt source phandle.
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- clock-frequency : specifies eSDHC base clock frequency.
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+ - sdhci,wp-inverted : (optional) specifies that eSDHC controller
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+ reports inverted write-protect state;
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- sdhci,1-bit-only : (optional) specifies that a controller can
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only handle 1-bit data transfers.
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--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
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+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
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@@ -159,6 +159,7 @@
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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+ sdhci,wp-inverted;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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};
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--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
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+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
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@@ -173,6 +173,7 @@
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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+ sdhci,wp-inverted;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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};
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--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
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+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
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@@ -150,6 +150,7 @@
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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+ sdhci,wp-inverted;
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clock-frequency = <133333333>;
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};
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};
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--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
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+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
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@@ -159,6 +159,7 @@
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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+ sdhci,wp-inverted;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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};
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--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
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+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
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@@ -173,6 +173,7 @@
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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+ sdhci,wp-inverted;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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};
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--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
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+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
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@@ -157,6 +157,7 @@
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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+ sdhci,wp-inverted;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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};
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--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
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+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
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@@ -171,6 +171,7 @@
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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+ sdhci,wp-inverted;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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};
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