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https://github.com/openwrt/openwrt.git
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3a9b6dc313
SVN-Revision: 31336
84 lines
2.8 KiB
Diff
84 lines
2.8 KiB
Diff
From 0ea046d777bf567cfd89c7d968c0b962e3e7589b Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 11 Apr 2012 18:47:53 +0200
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Subject: [PATCH 68/70] MIPS: lantiq: stp, fix for ase, add get, clock
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disabled
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Lantiq serial-to-parallel hardware gpio module
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Added gpio pins as used for amazon se (ase)
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Added get to enable reporting of gpio status
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Changed to use software update, as hw clock was not running on ase. Clock
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really only needed if hw flashing was implemented.
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Signed-off-by: Conor O'Gorman <i@conorogorman.net>
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---
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arch/mips/lantiq/xway/gpio_stp.c | 22 +++++++++++++---------
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1 files changed, 13 insertions(+), 9 deletions(-)
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--- a/arch/mips/lantiq/xway/gpio_stp.c
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+++ b/arch/mips/lantiq/xway/gpio_stp.c
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@@ -27,6 +27,7 @@
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#define LTQ_STP_AR 0x10
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#define LTQ_STP_CON_SWU (1 << 31)
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+#define LTQ_STP_SWU_MASK (1 << 31)
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#define LTQ_STP_2HZ 0
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#define LTQ_STP_4HZ (1 << 23)
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#define LTQ_STP_8HZ (2 << 23)
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@@ -60,6 +61,12 @@ static void ltq_stp_set(struct gpio_chip
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else
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ltq_stp_shadow &= ~(1 << offset);
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ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0);
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+ ltq_stp_w32_mask(LTQ_STP_SWU_MASK, LTQ_STP_CON_SWU, LTQ_STP_CON0);
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+}
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+
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+static int ltq_stp_get(struct gpio_chip *chip, unsigned offset)
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+{
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+ return !!(ltq_stp_r32(LTQ_STP_CPU0) & (1<<offset));
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}
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static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset,
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@@ -74,6 +81,7 @@ static struct gpio_chip ltq_stp_chip = {
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.label = "ltq_stp",
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.direction_output = ltq_stp_direction_output,
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.set = ltq_stp_set,
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+ .get = ltq_stp_get,
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.base = 200,
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.ngpio = 24,
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.owner = THIS_MODULE,
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@@ -97,12 +105,6 @@ static int ltq_stp_hw_init(struct device
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ltq_stp_w32_mask(0, LTQ_STP_GROUP0 | LTQ_STP_GROUP1 | LTQ_STP_GROUP2,
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LTQ_STP_CON1);
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- /* stp are update periodically by the FPI bus */
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- ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1);
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-
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- /* set stp update speed */
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- ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1);
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-
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/* tell the hardware that pin (led) 0 and 1 are controlled
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* by the dsl arc
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*/
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@@ -118,6 +120,7 @@ static int __devinit ltq_stp_probe(struc
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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int ret = 0;
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+ int pin;
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if (!res)
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return -ENOENT;
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@@ -135,9 +138,10 @@ static int __devinit ltq_stp_probe(struc
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}
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/* the 3 pins used to control the external stp */
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- if (ltq_gpio_request(&pdev->dev, 4, 2, 1, "stp-st") ||
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- ltq_gpio_request(&pdev->dev, 5, 2, 1, "stp-d") ||
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- ltq_gpio_request(&pdev->dev, 6, 2, 1, "stp-sh")) {
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+ pin = ltq_is_ase() ? 1 : 4;
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+ if (ltq_gpio_request(&pdev->dev, pin, 2, 1, "stp-st") ||
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+ ltq_gpio_request(&pdev->dev, pin+1, 2, 1, "stp-d") ||
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+ ltq_gpio_request(&pdev->dev, pin+2, 2, 1, "stp-sh")) {
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dev_err(&pdev->dev, "failed to request needed gpios\n");
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return -EBUSY;
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}
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