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236 lines
7.1 KiB
Diff
236 lines
7.1 KiB
Diff
From c87a0c58116b2b2d8ccee9bb64df652b563307c4 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 8 Mar 2012 11:19:11 +0100
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Subject: [PATCH 23/70] MIPS: lantiq: convert falcon to clkdev api
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Unify sysctrl/clock code and add clkdev hooks to sysctrl.c
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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.../include/asm/mach-lantiq/falcon/lantiq_soc.h | 8 +-
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arch/mips/lantiq/falcon/Makefile | 2 +-
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arch/mips/lantiq/falcon/sysctrl.c | 129 ++++++++++++--------
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3 files changed, 80 insertions(+), 59 deletions(-)
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--- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
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@@ -95,6 +95,7 @@
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/* Activation Status Register */
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#define ACTS_ASC1_ACT 0x00000800
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+#define ACTS_I2C_ACT 0x00004000
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#define ACTS_P0 0x00010000
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#define ACTS_P1 0x00010000
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#define ACTS_P2 0x00020000
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@@ -106,13 +107,6 @@
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#define ACTS_PADCTRL3 0x00200000
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#define ACTS_PADCTRL4 0x00400000
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-extern void ltq_sysctl_activate(int module, unsigned int mask);
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-extern void ltq_sysctl_deactivate(int module, unsigned int mask);
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-extern void ltq_sysctl_clken(int module, unsigned int mask);
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-extern void ltq_sysctl_clkdis(int module, unsigned int mask);
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-extern void ltq_sysctl_reboot(int module, unsigned int mask);
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-extern int ltq_gpe_is_activated(unsigned int mask);
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-
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/* global register ranges */
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extern __iomem void *ltq_ebu_membase;
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extern __iomem void *ltq_sys1_membase;
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--- a/arch/mips/lantiq/falcon/Makefile
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+++ b/arch/mips/lantiq/falcon/Makefile
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@@ -1,2 +1,2 @@
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-obj-y := clk.o prom.o reset.o sysctrl.o devices.o gpio.o
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+obj-y := prom.o reset.o sysctrl.o devices.o gpio.o
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obj-$(CONFIG_LANTIQ_MACH_EASY98000) += mach-easy98000.o
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--- a/arch/mips/lantiq/falcon/sysctrl.c
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+++ b/arch/mips/lantiq/falcon/sysctrl.c
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@@ -9,11 +9,13 @@
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#include <linux/ioport.h>
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#include <linux/export.h>
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+#include <linux/clkdev.h>
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#include <asm/delay.h>
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#include <lantiq_soc.h>
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#include "devices.h"
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+#include "../clk.h"
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/* infrastructure control register */
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#define SYS1_INFRAC 0x00bc
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@@ -38,6 +40,10 @@
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#define LTQ_SYSCTL_DEACT 0x0028
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/* reboot Register */
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#define LTQ_SYSCTL_RBT 0x002c
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+/* CPU0 Clock Control Register */
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+#define LTQ_SYS1_CPU0CC 0x0040
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+/* clock divider bit */
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+#define LTQ_CPU0CC_CPUDIV 0x0001
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static struct resource ltq_sysctl_res[] = {
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MEM_RES("sys1", LTQ_SYS1_BASE_ADDR, LTQ_SYS1_SIZE),
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@@ -64,79 +70,67 @@ void __iomem *ltq_ebu_membase;
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#define ltq_status_r32(x) ltq_r32(ltq_status_membase + (x))
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static inline void
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-ltq_sysctl_wait(int module, unsigned int mask,
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+ltq_sysctl_wait(struct clk *clk,
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unsigned int test, unsigned int reg)
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{
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int err = 1000000;
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- do {} while (--err && ((ltq_reg_r32(module, reg)
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- & mask) != test));
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+ do {} while (--err && ((ltq_reg_r32(clk->module, reg)
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+ & clk->bits) != test));
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if (!err)
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- pr_err("module de/activation failed %d %08X %08X\n",
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- module, mask, test);
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+ pr_err("module de/activation failed %d %08X %08X %08X\n",
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+ clk->module, clk->bits, test,
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+ ltq_reg_r32(clk->module, reg) & clk->bits);
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}
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-void
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-ltq_sysctl_activate(int module, unsigned int mask)
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-{
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- if (module > SYSCTL_SYSGPE)
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- return;
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-
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- ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN);
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- ltq_reg_w32(module, mask, LTQ_SYSCTL_ACT);
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- ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS);
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+static int
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+ltq_sysctl_activate(struct clk *clk)
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+{
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+ ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKEN);
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+ ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_ACT);
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+ ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_ACTS);
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+ return 0;
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}
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-EXPORT_SYMBOL(ltq_sysctl_activate);
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-void
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-ltq_sysctl_deactivate(int module, unsigned int mask)
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+static void
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+ltq_sysctl_deactivate(struct clk *clk)
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{
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- if (module > SYSCTL_SYSGPE)
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- return;
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-
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- ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR);
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- ltq_reg_w32(module, mask, LTQ_SYSCTL_DEACT);
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- ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_ACTS);
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+ ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKCLR);
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+ ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_DEACT);
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+ ltq_sysctl_wait(clk, 0, LTQ_SYSCTL_ACTS);
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}
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-EXPORT_SYMBOL(ltq_sysctl_deactivate);
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-void
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-ltq_sysctl_clken(int module, unsigned int mask)
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+static int
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+ltq_sysctl_clken(struct clk *clk)
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{
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- if (module > SYSCTL_SYSGPE)
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- return;
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-
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- ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN);
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- ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_CLKS);
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+ ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKEN);
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+ ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_CLKS);
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+ return 0;
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}
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-EXPORT_SYMBOL(ltq_sysctl_clken);
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-void
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-ltq_sysctl_clkdis(int module, unsigned int mask)
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+static void
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+ltq_sysctl_clkdis(struct clk *clk)
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{
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- if (module > SYSCTL_SYSGPE)
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- return;
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-
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- ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR);
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- ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_CLKS);
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+ ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKCLR);
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+ ltq_sysctl_wait(clk, 0, LTQ_SYSCTL_CLKS);
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}
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-EXPORT_SYMBOL(ltq_sysctl_clkdis);
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-void
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-ltq_sysctl_reboot(int module, unsigned int mask)
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+static void
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+ltq_sysctl_reboot(struct clk *clk)
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{
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unsigned int act;
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+ unsigned int bits;
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- if (module > SYSCTL_SYSGPE)
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- return;
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-
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- act = ltq_reg_r32(module, LTQ_SYSCTL_ACT);
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- if ((~act & mask) != 0)
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- ltq_sysctl_activate(module, ~act & mask);
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- ltq_reg_w32(module, act & mask, LTQ_SYSCTL_RBT);
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- ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS);
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+ act = ltq_reg_r32(clk->module, LTQ_SYSCTL_ACT);
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+ bits = ~act & clk->bits;
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+ if (bits != 0) {
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+ ltq_reg_w32(clk->module, bits, LTQ_SYSCTL_CLKEN);
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+ ltq_reg_w32(clk->module, bits, LTQ_SYSCTL_ACT);
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+ ltq_sysctl_wait(clk, bits, LTQ_SYSCTL_ACTS);
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+ }
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+ ltq_reg_w32(clk->module, act & clk->bits, LTQ_SYSCTL_RBT);
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+ ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_ACTS);
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}
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-EXPORT_SYMBOL(ltq_sysctl_reboot);
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/* enable the ONU core */
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static void
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@@ -167,6 +161,24 @@ ltq_gpe_enable(void)
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udelay(1);
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}
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+static inline void
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+clkdev_add_sys(const char *dev, unsigned int module,
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+ unsigned int bits)
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+{
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+ struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
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+
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+ clk->cl.dev_id = dev;
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+ clk->cl.con_id = NULL;
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+ clk->cl.clk = clk;
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+ clk->module = module;
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+ clk->activate = ltq_sysctl_activate;
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+ clk->deactivate = ltq_sysctl_deactivate;
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+ clk->enable = ltq_sysctl_clken;
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+ clk->disable = ltq_sysctl_clkdis;
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+ clk->reboot = ltq_sysctl_reboot;
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+ clkdev_add(&clk->cl);
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+}
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+
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void __init
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ltq_soc_init(void)
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{
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@@ -180,4 +192,19 @@ ltq_soc_init(void)
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ltq_ebu_membase = ltq_remap_resource(<q_ebu_res);
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ltq_gpe_enable();
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+
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+ /* get our 3 static rates for cpu, fpi and io clocks */
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+ if (ltq_sys1_r32(LTQ_SYS1_CPU0CC) & LTQ_CPU0CC_CPUDIV)
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+ clkdev_add_static(CLOCK_200M, CLOCK_100M, CLOCK_200M);
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+ else
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+ clkdev_add_static(CLOCK_400M, CLOCK_100M, CLOCK_200M);
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+
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+ /* add our clock domains */
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+ clkdev_add_sys("falcon_gpio.0", SYSCTL_SYSETH, ACTS_PADCTRL0 | ACTS_P0);
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+ clkdev_add_sys("falcon_gpio.1", SYSCTL_SYS1, ACTS_PADCTRL1 | ACTS_P1);
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+ clkdev_add_sys("falcon_gpio.2", SYSCTL_SYSETH, ACTS_PADCTRL2 | ACTS_P2);
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+ clkdev_add_sys("falcon_gpio.3", SYSCTL_SYS1, ACTS_PADCTRL3 | ACTS_P3);
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+ clkdev_add_sys("falcon_gpio.4", SYSCTL_SYS1, ACTS_PADCTRL4 | ACTS_P4);
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+ clkdev_add_sys("ltq_asc.1", SYSCTL_SYS1, ACTS_ASC1_ACT);
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+ clkdev_add_sys("falcon_i2c", SYSCTL_SYS1, ACTS_I2C_ACT);
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}
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