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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
235 lines
7.1 KiB
Diff
235 lines
7.1 KiB
Diff
From 2ef4d6383803ef0b5b4b1efa5b7577a7970f2669 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 7 Apr 2022 14:21:55 +0200
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Subject: [PATCH] clk: tests: Add tests for single parent mux
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We have a few tests for a mux with a single parent, testing the case
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where it used to be orphan.
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Let's leverage most of the code but register the clock properly to test
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a few trivial things.
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Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx8mp
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Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> # exynos4210, meson g12b
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/clk/clk_test.c | 186 +++++++++++++++++++++++++++++++++++++++--
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1 file changed, 177 insertions(+), 9 deletions(-)
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--- a/drivers/clk/clk_test.c
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+++ b/drivers/clk/clk_test.c
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@@ -352,6 +352,181 @@ struct clk_single_parent_ctx {
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struct clk_hw hw;
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};
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+static int clk_single_parent_mux_test_init(struct kunit *test)
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+{
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+ struct clk_single_parent_ctx *ctx;
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+ int ret;
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+
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+ ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
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+ if (!ctx)
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+ return -ENOMEM;
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+ test->priv = ctx;
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+
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+ ctx->parent_ctx.rate = DUMMY_CLOCK_INIT_RATE;
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+ ctx->parent_ctx.hw.init =
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+ CLK_HW_INIT_NO_PARENT("parent-clk",
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+ &clk_dummy_rate_ops,
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+ 0);
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+
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+ ret = clk_hw_register(NULL, &ctx->parent_ctx.hw);
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+ if (ret)
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+ return ret;
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+
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+ ctx->hw.init = CLK_HW_INIT("test-clk", "parent-clk",
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+ &clk_dummy_single_parent_ops,
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+ CLK_SET_RATE_PARENT);
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+
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+ ret = clk_hw_register(NULL, &ctx->hw);
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+ if (ret)
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+ return ret;
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+
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+ return 0;
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+}
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+
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+static void
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+clk_single_parent_mux_test_exit(struct kunit *test)
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+{
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+ struct clk_single_parent_ctx *ctx = test->priv;
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+
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+ clk_hw_unregister(&ctx->hw);
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+ clk_hw_unregister(&ctx->parent_ctx.hw);
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+}
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+
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+/*
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+ * Test that for a clock with a single parent, clk_get_parent() actually
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+ * returns the parent.
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+ */
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+static void
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+clk_test_single_parent_mux_get_parent(struct kunit *test)
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+{
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+ struct clk_single_parent_ctx *ctx = test->priv;
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+ struct clk_hw *hw = &ctx->hw;
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+ struct clk *clk = hw->clk;
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+ struct clk *parent;
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+
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+ parent = clk_get_parent(clk);
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+ KUNIT_EXPECT_TRUE(test, clk_is_match(parent, ctx->parent_ctx.hw.clk));
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+}
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+
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+/*
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+ * Test that for a clock that can't modify its rate and with a single
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+ * parent, if we set disjoints range on the parent and then the child,
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+ * the second will return an error.
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+ *
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+ * FIXME: clk_set_rate_range() only considers the current clock when
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+ * evaluating whether ranges are disjoints and not the upstream clocks
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+ * ranges.
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+ */
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+static void
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+clk_test_single_parent_mux_set_range_disjoint_child_last(struct kunit *test)
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+{
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+ struct clk_single_parent_ctx *ctx = test->priv;
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+ struct clk_hw *hw = &ctx->hw;
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+ struct clk *clk = hw->clk;
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+ struct clk *parent;
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+ int ret;
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+
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+ kunit_skip(test, "This needs to be fixed in the core.");
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+
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+ parent = clk_get_parent(clk);
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+ KUNIT_ASSERT_PTR_NE(test, parent, NULL);
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+
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+ ret = clk_set_rate_range(parent, 1000, 2000);
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+ KUNIT_ASSERT_EQ(test, ret, 0);
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+
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+ ret = clk_set_rate_range(clk, 3000, 4000);
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+ KUNIT_EXPECT_LT(test, ret, 0);
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+}
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+
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+/*
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+ * Test that for a clock that can't modify its rate and with a single
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+ * parent, if we set disjoints range on the child and then the parent,
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+ * the second will return an error.
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+ *
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+ * FIXME: clk_set_rate_range() only considers the current clock when
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+ * evaluating whether ranges are disjoints and not the downstream clocks
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+ * ranges.
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+ */
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+static void
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+clk_test_single_parent_mux_set_range_disjoint_parent_last(struct kunit *test)
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+{
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+ struct clk_single_parent_ctx *ctx = test->priv;
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+ struct clk_hw *hw = &ctx->hw;
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+ struct clk *clk = hw->clk;
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+ struct clk *parent;
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+ int ret;
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+
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+ kunit_skip(test, "This needs to be fixed in the core.");
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+
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+ parent = clk_get_parent(clk);
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+ KUNIT_ASSERT_PTR_NE(test, parent, NULL);
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+
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+ ret = clk_set_rate_range(clk, 1000, 2000);
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+ KUNIT_ASSERT_EQ(test, ret, 0);
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+
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+ ret = clk_set_rate_range(parent, 3000, 4000);
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+ KUNIT_EXPECT_LT(test, ret, 0);
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+}
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+
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+/*
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+ * Test that for a clock that can't modify its rate and with a single
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+ * parent, if we set a range on the parent and a more restrictive one on
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+ * the child, and then call clk_round_rate(), the boundaries of the
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+ * two clocks are taken into account.
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+ */
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+static void
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+clk_test_single_parent_mux_set_range_round_rate_child_smaller(struct kunit *test)
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+{
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+ struct clk_single_parent_ctx *ctx = test->priv;
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+ struct clk_hw *hw = &ctx->hw;
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+ struct clk *clk = hw->clk;
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+ struct clk *parent;
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+ unsigned long rate;
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+ int ret;
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+
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+ parent = clk_get_parent(clk);
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+ KUNIT_ASSERT_PTR_NE(test, parent, NULL);
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+
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+ ret = clk_set_rate_range(parent, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);
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+ KUNIT_ASSERT_EQ(test, ret, 0);
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+
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+ ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1 + 1000, DUMMY_CLOCK_RATE_2 - 1000);
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+ KUNIT_ASSERT_EQ(test, ret, 0);
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+
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+ rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);
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+ KUNIT_ASSERT_GT(test, rate, 0);
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+ KUNIT_EXPECT_GE(test, rate, DUMMY_CLOCK_RATE_1 + 1000);
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+ KUNIT_EXPECT_LE(test, rate, DUMMY_CLOCK_RATE_2 - 1000);
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+
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+ rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);
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+ KUNIT_ASSERT_GT(test, rate, 0);
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+ KUNIT_EXPECT_GE(test, rate, DUMMY_CLOCK_RATE_1 + 1000);
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+ KUNIT_EXPECT_LE(test, rate, DUMMY_CLOCK_RATE_2 - 1000);
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+}
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+
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+static struct kunit_case clk_single_parent_mux_test_cases[] = {
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+ KUNIT_CASE(clk_test_single_parent_mux_get_parent),
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+ KUNIT_CASE(clk_test_single_parent_mux_set_range_disjoint_child_last),
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+ KUNIT_CASE(clk_test_single_parent_mux_set_range_disjoint_parent_last),
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+ KUNIT_CASE(clk_test_single_parent_mux_set_range_round_rate_child_smaller),
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+ {}
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+};
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+
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+/*
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+ * Test suite for a basic mux clock with one parent, with
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+ * CLK_SET_RATE_PARENT on the child.
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+ *
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+ * These tests are supposed to exercise the consumer API and check that
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+ * the state of the child and parent are sane and consistent.
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+ */
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+static struct kunit_suite
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+clk_single_parent_mux_test_suite = {
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+ .name = "clk-single-parent-mux-test",
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+ .init = clk_single_parent_mux_test_init,
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+ .exit = clk_single_parent_mux_test_exit,
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+ .test_cases = clk_single_parent_mux_test_cases,
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+};
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+
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static int clk_orphan_transparent_single_parent_mux_test_init(struct kunit *test)
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{
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struct clk_single_parent_ctx *ctx;
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@@ -388,14 +563,6 @@ static int clk_orphan_transparent_single
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return 0;
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}
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-static void clk_orphan_transparent_single_parent_mux_test_exit(struct kunit *test)
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-{
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- struct clk_single_parent_ctx *ctx = test->priv;
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-
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- clk_hw_unregister(&ctx->hw);
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- clk_hw_unregister(&ctx->parent_ctx.hw);
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-}
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-
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/*
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* Test that a mux-only clock, with an initial rate within a range,
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* will still have the same rate after the range has been enforced.
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@@ -440,7 +607,7 @@ static struct kunit_case clk_orphan_tran
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static struct kunit_suite clk_orphan_transparent_single_parent_test_suite = {
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.name = "clk-orphan-transparent-single-parent-test",
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.init = clk_orphan_transparent_single_parent_mux_test_init,
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- .exit = clk_orphan_transparent_single_parent_mux_test_exit,
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+ .exit = clk_single_parent_mux_test_exit,
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.test_cases = clk_orphan_transparent_single_parent_mux_test_cases,
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};
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@@ -1128,6 +1295,7 @@ kunit_test_suites(
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&clk_range_test_suite,
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&clk_range_maximize_test_suite,
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&clk_range_minimize_test_suite,
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+ &clk_single_parent_mux_test_suite,
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&clk_uncached_test_suite
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);
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MODULE_LICENSE("GPL v2");
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