openwrt/target/linux/ath79/dts/ar9344_pcs_cap324.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "ar9344.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "PowerCloud Systems CAP324";
	compatible = "pcs,cap324", "qca,ar9344";

	aliases {
		serial0 = &uart;
		led-boot = &led_power_amber;
		led-failsafe = &led_power_amber;
		led-running = &led_power_green;
		led-upgrade = &led_power_amber;
	};

	keys {
		compatible = "gpio-keys";

		pinctrl-names = "default";
		pinctrl-0 = <&jtag_disable_pins>;

		reset {
			label = "Reset button";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_power_amber: power_amber {
			label = "amber:power";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
		};

		led_power_green: power_green {
			label = "green:power";
			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		wlan_amber {
			label = "amber:wlan";
			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};

		wlan_green {
			label = "green:wlan";
			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		lan_amber {
			label = "amber:lan";
			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
		};

		lan_green {
			label = "green:lan";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
		};
	};
};

&ref {
	clock-frequency = <25000000>;
};

&uart {
	status = "okay";
};

&spi {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			uboot: partition@0 {
				label = "u-boot";
				reg = <0x000000 0x040000>;
				read-only;
			};

			partition@40000 {
				label = "u-boot-env";
				reg = <0x040000 0x010000>;
				read-only;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x050000 0x0fa0000>;
			};

			art: partition@7f0000 {
				label = "art";
				reg = <0xff0000 0x010000>;
				read-only;
			};
		};
	};
};

&pcie {
	status = "okay";

	ath9k: wifi@0,0 {
		compatible = "168c,0030";
		reg = <0x0000 0 0 0 0>;
		mtd-mac-address = <&art 0x0>;
		mtd-mac-address-increment = <(-2)>;
		mtd-cal-data = <&art 0x5000>;
		qca,no-eeprom;
		qca,disable-5ghz;
		#gpio-cells = <2>;
		gpio-controller;
	};
};

&wmac {
	status = "okay";

	qca,disable-2ghz;
	mtd-cal-data = <&art 0x1000>;
	mtd-mac-address = <&art 0x0>;
	mtd-mac-address-increment = <(-1)>;
};

&mdio0 {
	status = "okay";

	phy-mask = <0>;

	phy0: ethernet-phy@0 {
		reg = <0>;
		phy-mode = "rgmii";
	};
};

&eth0 {
	status = "okay";

	/* default for ar934x, except for 1000M */
	pll-data = <0x06000000 0x00000101 0x00001616>;

	mtd-mac-address = <&art 0x0>;

	phy-mode = "rgmii";
	phy-handle = <&phy0>;
};