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https://github.com/openwrt/openwrt.git
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d41d9befb9
Add u-boot bootloader based on 2023.01 to support D1-based boards, currently: - Dongshan Nezha STU - LicheePi RV Dock - MangoPi MQ-Pro - Nezha D1 Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
156 lines
4.3 KiB
Diff
156 lines
4.3 KiB
Diff
From 7585a12ffec6e42c62222d8ee4085413b3a197f7 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sat, 9 Oct 2021 14:58:27 -0500
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Subject: [PATCH 38/90] remoteproc: Add a driver for the Allwinner AR100
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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drivers/remoteproc/Kconfig | 9 ++
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drivers/remoteproc/Makefile | 1 +
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drivers/remoteproc/sun6i_ar100_rproc.c | 111 +++++++++++++++++++++++++
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3 files changed, 121 insertions(+)
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create mode 100644 drivers/remoteproc/sun6i_ar100_rproc.c
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--- a/drivers/remoteproc/Kconfig
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+++ b/drivers/remoteproc/Kconfig
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@@ -41,6 +41,15 @@ config REMOTEPROC_STM32_COPRO
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Say 'y' here to add support for STM32 Cortex-M4 coprocessors via the
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remoteproc framework.
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+config REMOTEPROC_SUN6I_AR100
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+ bool "Support for Allwinner AR100 SCP"
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+ select REMOTEPROC
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+ depends on ARCH_SUNXI
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+ help
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+ Say 'y' here to support Allwinner's AR100 System Control Processor
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+ (SCP), found in various sun6i/sun8i/sun50i family SoCs, through the
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+ remoteproc framework.
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+
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config REMOTEPROC_TI_K3_ARM64
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bool "Support for TI's K3 based ARM64 remoteproc driver"
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select REMOTEPROC
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--- a/drivers/remoteproc/Makefile
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+++ b/drivers/remoteproc/Makefile
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@@ -10,6 +10,7 @@ obj-$(CONFIG_$(SPL_)REMOTEPROC) += rproc
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obj-$(CONFIG_K3_SYSTEM_CONTROLLER) += k3_system_controller.o
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obj-$(CONFIG_REMOTEPROC_SANDBOX) += sandbox_testproc.o
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obj-$(CONFIG_REMOTEPROC_STM32_COPRO) += stm32_copro.o
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+obj-$(CONFIG_REMOTEPROC_SUN6I_AR100) += sun6i_ar100_rproc.o
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obj-$(CONFIG_REMOTEPROC_TI_K3_ARM64) += ti_k3_arm64_rproc.o
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obj-$(CONFIG_REMOTEPROC_TI_K3_DSP) += ti_k3_dsp_rproc.o
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obj-$(CONFIG_REMOTEPROC_TI_K3_R5F) += ti_k3_r5f_rproc.o
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--- /dev/null
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+++ b/drivers/remoteproc/sun6i_ar100_rproc.c
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@@ -0,0 +1,111 @@
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+// SPDX-License-Identifier: GPL-2.0
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+
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+#include <dm.h>
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+#include <errno.h>
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+#include <remoteproc.h>
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+#include <asm/io.h>
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+
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+#define SUNXI_SCP_MAGIC 0xb4400012
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+
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+#define OR1K_VEC_FIRST 0x01
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+#define OR1K_VEC_LAST 0x0e
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+#define OR1K_VEC_ADDR(n) (0x100 * (n))
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+
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+struct sun6i_ar100_rproc_priv {
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+ void *cfg_base;
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+ ulong sram_base;
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+};
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+
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+static int sun6i_ar100_rproc_load(struct udevice *dev, ulong addr, ulong size)
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+{
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+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev);
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+
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+ /* Check for a valid SCP firmware. */
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+ if (readl_relaxed(addr) != SUNXI_SCP_MAGIC)
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+ return -ENOENT;
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+
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+ /* Program exception vectors to the firmware entry point. */
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+ for (u32 i = OR1K_VEC_FIRST; i <= OR1K_VEC_LAST; ++i) {
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+ ulong vector = priv->sram_base + OR1K_VEC_ADDR(i);
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+ ulong offset = addr - vector;
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+
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+ writel_relaxed(offset >> 2, vector);
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+ }
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+
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+ return 0;
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+}
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+
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+static int sun6i_ar100_rproc_start(struct udevice *dev)
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+{
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+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev);
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+
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+ setbits_le32(priv->cfg_base, BIT(0));
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+
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+ return 0;
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+}
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+
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+static int sun6i_ar100_rproc_stop(struct udevice *dev)
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+{
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+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev);
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+
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+ clrbits_le32(priv->cfg_base, BIT(0));
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+
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+ return 0;
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+}
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+
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+static int sun6i_ar100_rproc_reset(struct udevice *dev)
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+{
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+ int ret;
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+
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+ ret = sun6i_ar100_rproc_stop(dev);
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+ if (ret)
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+ return ret;
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+
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+ return sun6i_ar100_rproc_start(dev);
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+}
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+
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+static int sun6i_ar100_rproc_is_running(struct udevice *dev)
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+{
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+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev);
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+
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+ return !(readl_relaxed(priv->cfg_base) & BIT(0));
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+}
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+
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+static const struct dm_rproc_ops sun6i_ar100_rproc_ops = {
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+ .load = sun6i_ar100_rproc_load,
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+ .start = sun6i_ar100_rproc_start,
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+ .stop = sun6i_ar100_rproc_stop,
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+ .reset = sun6i_ar100_rproc_reset,
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+ .is_running = sun6i_ar100_rproc_is_running,
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+};
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+
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+static int sun6i_ar100_rproc_probe(struct udevice *dev)
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+{
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+ struct sun6i_ar100_rproc_priv *priv = dev_get_priv(dev);
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+ struct ofnode_phandle_args sram_handle;
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+ int ret;
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+
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+ priv->cfg_base = dev_read_addr_ptr(dev);
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+
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+ ret = dev_read_phandle_with_args(dev, "sram", NULL, 0, 0, &sram_handle);
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+ if (ret)
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+ return ret;
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+
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+ priv->sram_base = ofnode_get_addr(sram_handle.node);
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+
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+ return 0;
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+}
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+
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+static const struct udevice_id sun6i_ar100_rproc_ids[] = {
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+ { .compatible = "allwinner,sun6i-a31-ar100" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(sun6i_ar100_rproc) = {
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+ .name = "sun6i_ar100_rproc",
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+ .id = UCLASS_REMOTEPROC,
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+ .of_match = sun6i_ar100_rproc_ids,
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+ .probe = sun6i_ar100_rproc_probe,
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+ .priv_auto = sizeof(struct sun6i_ar100_rproc_priv),
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+ .ops = &sun6i_ar100_rproc_ops,
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+};
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