mirror of
https://github.com/openwrt/openwrt.git
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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
697 lines
16 KiB
Diff
697 lines
16 KiB
Diff
From 0f02c32b2d27fa5f0b21c67fb5518a36b5234f3a Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Tue, 7 Jul 2020 09:01:54 +0100
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Subject: [PATCH] ARM: dts: Make bcm2711 dts more like 5.7
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The multiple declarations of pixelvalve2 were causing problems for the
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DT checkers. Aligning the dts files closer to the later kernel versions
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avoids some repetition and should make maintenance easier.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 142 ++++++++++++-----------
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arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 69 +----------
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arch/arm/boot/dts/bcm2711-rpi.dtsi | 150 +++++++++++++++++++++++-
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arch/arm/boot/dts/bcm2711.dtsi | 157 +++-----------------------
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4 files changed, 245 insertions(+), 273 deletions(-)
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--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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@@ -19,7 +19,9 @@
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};
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aliases {
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+ emmc2bus = &emmc2bus;
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ethernet0 = &genet;
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+ pcie0 = &pcie0;
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};
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leds {
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@@ -30,6 +32,8 @@
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pwr {
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label = "PWR";
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gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
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+ default-state = "keep";
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+ linux,default-trigger = "default-on";
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};
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};
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@@ -70,6 +74,79 @@
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};
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};
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+&gpio {
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+ /*
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+ * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
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+ * the official GPU firmware DT blob.
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+ *
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+ * Legend:
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+ * "FOO" = GPIO line named "FOO" on the schematic
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+ * "FOO_N" = GPIO line named "FOO" on schematic, active low
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+ */
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+ gpio-line-names = "ID_SDA",
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+ "ID_SCL",
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+ "SDA1",
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+ "SCL1",
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+ "GPIO_GCLK",
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+ "GPIO5",
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+ "GPIO6",
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+ "SPI_CE1_N",
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+ "SPI_CE0_N",
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+ "SPI_MISO",
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+ "SPI_MOSI",
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+ "SPI_SCLK",
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+ "GPIO12",
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+ "GPIO13",
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+ /* Serial port */
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+ "TXD1",
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+ "RXD1",
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+ "GPIO16",
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+ "GPIO17",
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+ "GPIO18",
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+ "GPIO19",
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+ "GPIO20",
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+ "GPIO21",
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+ "GPIO22",
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+ "GPIO23",
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+ "GPIO24",
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+ "GPIO25",
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+ "GPIO26",
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+ "GPIO27",
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+ "RGMII_MDIO",
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+ "RGMIO_MDC",
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+ /* Used by BT module */
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+ "CTS0",
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+ "RTS0",
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+ "TXD0",
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+ "RXD0",
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+ /* Used by Wifi */
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+ "SD1_CLK",
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+ "SD1_CMD",
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+ "SD1_DATA0",
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+ "SD1_DATA1",
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+ "SD1_DATA2",
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+ "SD1_DATA3",
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+ /* Shared with SPI flash */
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+ "PWM0_MISO",
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+ "PWM1_MOSI",
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+ "STATUS_LED_G_CLK",
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+ "SPIFLASH_CE_N",
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+ "SDA0",
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+ "SCL0",
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+ "RGMII_RXCLK",
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+ "RGMII_RXCTL",
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+ "RGMII_RXD0",
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+ "RGMII_RXD1",
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+ "RGMII_RXD2",
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+ "RGMII_RXD3",
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+ "RGMII_TXCLK",
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+ "RGMII_TXCTL",
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+ "RGMII_TXD0",
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+ "RGMII_TXD1",
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+ "RGMII_TXD2",
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+ "RGMII_TXD3";
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+};
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+
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
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@@ -138,46 +215,6 @@
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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};
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-&vc4 {
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- status = "okay";
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-};
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-
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-&pixelvalve0 {
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- status = "okay";
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-};
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-
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-&pixelvalve1 {
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- status = "okay";
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-};
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-
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-&pixelvalve2 {
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- status = "okay";
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-};
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-
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-&pixelvalve3 {
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- status = "okay";
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-};
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-
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-&pixelvalve4 {
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- status = "okay";
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-};
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-
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-&hdmi0 {
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- status = "okay";
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-};
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-
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-&ddc0 {
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- status = "okay";
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-};
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-
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-&hdmi1 {
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- status = "okay";
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-};
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-
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-&ddc1 {
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- status = "okay";
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-};
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-
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// =============================================
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// Downstream rpi- changes
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@@ -195,8 +232,6 @@
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#include "bcm283x-rpi-csi1-2lane.dtsi"
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#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
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-/delete-node/ &emmc2;
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-
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/ {
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chosen {
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bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
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@@ -213,29 +248,7 @@
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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- /delete-property/ ethernet;
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/delete-property/ intc;
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- pcie0 = &pcie0;
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- emmc2bus = &emmc2bus;
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- };
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-
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- emmc2bus: emmc2bus {
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- compatible = "simple-bus";
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- #address-cells = <2>;
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- #size-cells = <1>;
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-
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- ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
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- dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
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-
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- emmc2: emmc2@7e340000 {
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- compatible = "brcm,bcm2711-emmc2";
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- status = "okay";
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- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
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- clocks = <&clocks BCM2711_CLOCK_EMMC2>;
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- reg = <0x0 0x7e340000 0x100>;
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- vqmmc-supply = <&sd_io_1v8_reg>;
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- broken-cd;
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- };
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};
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/delete-node/ wifi-pwrseq;
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@@ -557,6 +570,7 @@
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eth_led0 = <&phy1>,"led-modes:0";
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eth_led1 = <&phy1>,"led-modes:4";
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+ sd_poll_once = <&emmc2>, "non-removable?";
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spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
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<&spi0>, "dmas:8=", <&dma40>;
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};
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--- a/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
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+++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
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@@ -19,7 +19,9 @@
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};
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aliases {
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+ emmc2bus = &emmc2bus;
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ethernet0 = &genet;
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+ pcie0 = &pcie0;
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};
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leds {
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@@ -30,6 +32,8 @@
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pwr {
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label = "PWR";
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gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
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+ default-state = "keep";
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+ linux,default-trigger = "default-on";
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};
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};
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@@ -150,46 +154,6 @@
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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};
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-&vc4 {
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- status = "okay";
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-};
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-
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-&pixelvalve0 {
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- status = "okay";
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-};
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-
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-&pixelvalve1 {
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- status = "okay";
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-};
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-
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-&pixelvalve2 {
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- status = "okay";
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-};
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-
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-&pixelvalve3 {
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- status = "okay";
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-};
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-
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-&pixelvalve4 {
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- status = "okay";
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-};
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-
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-&hdmi0 {
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- status = "okay";
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-};
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-
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-&ddc0 {
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- status = "okay";
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-};
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-
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-&hdmi1 {
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- status = "okay";
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-};
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-
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-&ddc1 {
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- status = "okay";
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-};
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-
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// =============================================
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// Downstream rpi- changes
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@@ -208,8 +172,6 @@
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#include "bcm283x-rpi-csi1-4lane.dtsi"
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#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
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-/delete-node/ &emmc2;
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-
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/ {
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chosen {
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bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
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@@ -226,29 +188,7 @@
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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- /delete-property/ ethernet;
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/delete-property/ intc;
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- pcie0 = &pcie0;
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- emmc2bus = &emmc2bus;
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- };
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-
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- emmc2bus: emmc2bus {
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- compatible = "simple-bus";
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- #address-cells = <2>;
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- #size-cells = <1>;
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-
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- ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
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- dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
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-
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- emmc2: emmc2@7e340000 {
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- compatible = "brcm,bcm2711-emmc2";
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- status = "okay";
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- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
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- clocks = <&clocks BCM2711_CLOCK_EMMC2>;
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- reg = <0x0 0x7e340000 0x100>;
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- vqmmc-supply = <&sd_io_1v8_reg>;
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- broken-cd;
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- };
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};
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/delete-node/ wifi-pwrseq;
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@@ -588,6 +528,7 @@
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<&ant2>, "output-high?=off",
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<&ant2>, "output-low?=on";
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+ sd_poll_once = <&emmc2>, "non-removable?";
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spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
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<&spi0>, "dmas:8=", <&dma40>;
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};
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--- a/arch/arm/boot/dts/bcm2711-rpi.dtsi
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+++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi
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@@ -4,6 +4,129 @@
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/ {
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soc {
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/delete-node/ v3d@7ec00000;
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+
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+ pixelvalve0: pixelvalve@7e206000 {
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+ compatible = "brcm,bcm2711-pixelvalve0";
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+ reg = <0x7e206000 0x100>;
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+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ pixelvalve1: pixelvalve@7e207000 {
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+ compatible = "brcm,bcm2711-pixelvalve1";
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+ reg = <0x7e207000 0x100>;
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+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ pixelvalve2: pixelvalve@7e20a000 {
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+ compatible = "brcm,bcm2711-pixelvalve2";
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+ reg = <0x7e20a000 0x100>;
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+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ pixelvalve4: pixelvalve@7e216000 {
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+ compatible = "brcm,bcm2711-pixelvalve4";
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+ reg = <0x7e216000 0x100>;
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+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ pixelvalve3: pixelvalve@7ec12000 {
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+ compatible = "brcm,bcm2711-pixelvalve3";
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+ reg = <0x7ec12000 0x100>;
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+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ dvp: clock@7ef00000 {
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+ compatible = "brcm,brcm2711-dvp";
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+ reg = <0x7ef00000 0x10>;
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+ clocks = <&clk_108MHz>;
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+ #clock-cells = <1>;
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+ #reset-cells = <1>;
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+ };
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+
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+ hdmi0: hdmi@7ef00700 {
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+ compatible = "brcm,bcm2711-hdmi0";
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+ reg = <0x7ef00700 0x300>,
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+ <0x7ef00300 0x200>,
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+ <0x7ef00f00 0x80>,
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+ <0x7ef00f80 0x80>,
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+ <0x7ef01b00 0x200>,
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+ <0x7ef01f00 0x400>,
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+ <0x7ef00200 0x80>,
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+ <0x7ef04300 0x100>,
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+ <0x7ef20000 0x100>,
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+ <0x7ef00100 0x30>;
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+ reg-names = "hdmi",
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+ "dvp",
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+ "phy",
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+ "rm",
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+ "packet",
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+ "metadata",
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+ "csc",
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+ "cec",
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+ "hd",
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+ "intr2";
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+ clocks = <&firmware_clocks 13>;
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+ clock-names = "hdmi";
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+ resets = <&dvp 0>;
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+ ddc = <&ddc0>;
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+ dmas = <&dma 10>;
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+ dma-names = "audio-rx";
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+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ ddc0: i2c@7ef04500 {
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+ compatible = "brcm,bcm2711-hdmi-i2c";
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+ reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
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+ reg-names = "bsc", "auto-i2c";
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+ clock-frequency = <97500>;
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+ status = "disabled";
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+ };
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+
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+ hdmi1: hdmi@7ef05700 {
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+ compatible = "brcm,bcm2711-hdmi1";
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+ reg = <0x7ef05700 0x300>,
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+ <0x7ef05300 0x200>,
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+ <0x7ef05f00 0x80>,
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+ <0x7ef05f80 0x80>,
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+ <0x7ef06b00 0x200>,
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+ <0x7ef06f00 0x400>,
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+ <0x7ef00280 0x80>,
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+ <0x7ef09300 0x100>,
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+ <0x7ef20000 0x100>,
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+ <0x7ef00100 0x30>;
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+ reg-names = "hdmi",
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+ "dvp",
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+ "phy",
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+ "rm",
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+ "packet",
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+ "metadata",
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+ "csc",
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+ "cec",
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+ "hd",
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+ "intr2";
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+ ddc = <&ddc1>;
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+ clocks = <&firmware_clocks 13>;
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+ clock-names = "hdmi";
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+ resets = <&dvp 1>;
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+ dmas = <&dma 17>;
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+ dma-names = "audio-rx";
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+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ ddc1: i2c@7ef09500 {
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+ compatible = "brcm,bcm2711-hdmi-i2c";
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+ reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
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+ reg-names = "bsc", "auto-i2c";
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+ clock-frequency = <97500>;
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+ status = "disabled";
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+ };
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};
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__overrides__ {
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@@ -42,22 +165,33 @@
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scb: scb {
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/* Add a label */
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};
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-};
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-&cma {
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- /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
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- alloc-ranges = <0x0 0x00000000 0x30000000>;
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+ vc4: gpu {
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+ compatible = "brcm,bcm2711-vc5";
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+ status = "disabled";
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+ };
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+
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+ clk_108MHz: clk-108M {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <108000000>;
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+ clock-output-names = "108MHz-clock";
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+ };
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};
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&soc {
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/delete-node/ audio;
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};
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+&cma {
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+ /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
|
|
+ alloc-ranges = <0x0 0x00000000 0x30000000>;
|
|
+};
|
|
+
|
|
&scb {
|
|
ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
|
|
<0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>,
|
|
- <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>,
|
|
- <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>;
|
|
+ <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>;
|
|
dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>,
|
|
<0x1 0x00000000 0x1 0x00000000 0x1 0x00000000>;
|
|
|
|
@@ -171,6 +305,10 @@
|
|
compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5";
|
|
};
|
|
|
|
+&hvs {
|
|
+ clocks = <&firmware_clocks 4>;
|
|
+};
|
|
+
|
|
&firmware {
|
|
firmware_clocks: clocks {
|
|
compatible = "raspberrypi,firmware-clocks";
|
|
--- a/arch/arm/boot/dts/bcm2711.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm2711.dtsi
|
|
@@ -12,18 +12,6 @@
|
|
|
|
interrupt-parent = <&gicv2>;
|
|
|
|
- vc4: gpu {
|
|
- compatible = "brcm,bcm2711-vc5";
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- clk_108MHz: clk-108M {
|
|
- #clock-cells = <0>;
|
|
- compatible = "fixed-clock";
|
|
- clock-frequency = <108000000>;
|
|
- clock-output-names = "108MHz-clock";
|
|
- };
|
|
-
|
|
soc {
|
|
/*
|
|
* Defined ranges:
|
|
@@ -245,27 +233,6 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
- pixelvalve0: pixelvalve@7e206000 {
|
|
- compatible = "brcm,bcm2711-pixelvalve0";
|
|
- reg = <0x7e206000 0x100>;
|
|
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- pixelvalve1: pixelvalve@7e207000 {
|
|
- compatible = "brcm,bcm2711-pixelvalve1";
|
|
- reg = <0x7e207000 0x100>;
|
|
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- pixelvalve2: pixelvalve@7e20a000 {
|
|
- compatible = "brcm,bcm2711-pixelvalve2";
|
|
- reg = <0x7e20a000 0x100>;
|
|
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
pwm1: pwm@7e20c800 {
|
|
compatible = "brcm,bcm2835-pwm";
|
|
reg = <0x7e20c800 0x28>;
|
|
@@ -276,118 +243,30 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
- pixelvalve4: pixelvalve@7e216000 {
|
|
- compatible = "brcm,bcm2711-pixelvalve4";
|
|
- reg = <0x7e216000 0x100>;
|
|
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- emmc2: emmc2@7e340000 {
|
|
- compatible = "brcm,bcm2711-emmc2";
|
|
- reg = <0x7e340000 0x100>;
|
|
- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
- clocks = <&clocks BCM2711_CLOCK_EMMC2>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
hvs@7e400000 {
|
|
- clocks = <&firmware_clocks 4>;
|
|
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
+ };
|
|
|
|
- pixelvalve3: pixelvalve@7ec12000 {
|
|
- compatible = "brcm,bcm2711-pixelvalve3";
|
|
- reg = <0x7ec12000 0x100>;
|
|
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
|
- status = "disabled";
|
|
- };
|
|
+ /*
|
|
+ * emmc2 has different DMA constraints based on SoC revisions. It was
|
|
+ * moved into its own bus, so as for RPi4's firmware to update them.
|
|
+ * The firmware will find whether the emmc2bus alias is defined, and if
|
|
+ * so, it'll edit the dma-ranges property below accordingly.
|
|
+ */
|
|
+ emmc2bus: emmc2bus {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
|
|
- dvp: clock@7ef00000 {
|
|
- compatible = "brcm,brcm2711-dvp";
|
|
- reg = <0x7ef00000 0x10>;
|
|
- clocks = <&clk_108MHz>;
|
|
- #clock-cells = <1>;
|
|
- #reset-cells = <1>;
|
|
- };
|
|
+ ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
|
|
+ dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
|
|
|
|
- hdmi0: hdmi@7ef00700 {
|
|
- compatible = "brcm,bcm2711-hdmi0";
|
|
- reg = <0x7ef00700 0x300>,
|
|
- <0x7ef00300 0x200>,
|
|
- <0x7ef00f00 0x80>,
|
|
- <0x7ef00f80 0x80>,
|
|
- <0x7ef01b00 0x200>,
|
|
- <0x7ef01f00 0x400>,
|
|
- <0x7ef00200 0x80>,
|
|
- <0x7ef04300 0x100>,
|
|
- <0x7ef20000 0x100>,
|
|
- <0x7ef00100 0x30>;
|
|
- reg-names = "hdmi",
|
|
- "dvp",
|
|
- "phy",
|
|
- "rm",
|
|
- "packet",
|
|
- "metadata",
|
|
- "csc",
|
|
- "cec",
|
|
- "hd",
|
|
- "intr2";
|
|
- clocks = <&firmware_clocks 13>;
|
|
- clock-names = "hdmi";
|
|
- resets = <&dvp 0>;
|
|
- ddc = <&ddc0>;
|
|
- dmas = <&dma 10>;
|
|
- dma-names = "audio-rx";
|
|
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- ddc0: i2c@7ef04500 {
|
|
- compatible = "brcm,bcm2711-hdmi-i2c";
|
|
- reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
|
|
- reg-names = "bsc", "auto-i2c";
|
|
- clock-frequency = <97500>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- hdmi1: hdmi@7ef05700 {
|
|
- compatible = "brcm,bcm2711-hdmi1";
|
|
- reg = <0x7ef05700 0x300>,
|
|
- <0x7ef05300 0x200>,
|
|
- <0x7ef05f00 0x80>,
|
|
- <0x7ef05f80 0x80>,
|
|
- <0x7ef06b00 0x200>,
|
|
- <0x7ef06f00 0x400>,
|
|
- <0x7ef00280 0x80>,
|
|
- <0x7ef09300 0x100>,
|
|
- <0x7ef20000 0x100>,
|
|
- <0x7ef00100 0x30>;
|
|
- reg-names = "hdmi",
|
|
- "dvp",
|
|
- "phy",
|
|
- "rm",
|
|
- "packet",
|
|
- "metadata",
|
|
- "csc",
|
|
- "cec",
|
|
- "hd",
|
|
- "intr2";
|
|
- ddc = <&ddc1>;
|
|
- clocks = <&firmware_clocks 13>;
|
|
- clock-names = "hdmi";
|
|
- resets = <&dvp 1>;
|
|
- dmas = <&dma 17>;
|
|
- dma-names = "audio-rx";
|
|
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- ddc1: i2c@7ef09500 {
|
|
- compatible = "brcm,bcm2711-hdmi-i2c";
|
|
- reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
|
|
- reg-names = "bsc", "auto-i2c";
|
|
- clock-frequency = <97500>;
|
|
+ emmc2: emmc2@7e340000 {
|
|
+ compatible = "brcm,bcm2711-emmc2";
|
|
+ reg = <0x0 0x7e340000 0x100>;
|
|
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2711_CLOCK_EMMC2>;
|
|
status = "disabled";
|
|
};
|
|
};
|