mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-29 10:08:59 +00:00
62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64
)
175 lines
3.9 KiB
Diff
175 lines
3.9 KiB
Diff
From 965351ba5a271c0a4a7776193b7af78871370f7a Mon Sep 17 00:00:00 2001
|
|
From: Maxime Ripard <maxime@cerno.tech>
|
|
Date: Thu, 13 Feb 2020 16:45:24 +0100
|
|
Subject: [PATCH] dt-bindings: display: vc4: hdmi: Add BCM2711 HDMI
|
|
controllers bindings
|
|
|
|
The HDMI controllers found in the BCM2711 SoC need some adjustments to the
|
|
bindings, especially since the registers have been shuffled around in more
|
|
register ranges.
|
|
|
|
Cc: Rob Herring <robh+dt@kernel.org>
|
|
Cc: devicetree@vger.kernel.org
|
|
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
|
---
|
|
.../bindings/display/brcm,bcm2835-hdmi.yaml | 118 ++++++++++++++++--
|
|
1 file changed, 109 insertions(+), 9 deletions(-)
|
|
|
|
--- a/Documentation/devicetree/bindings/display/brcm,bcm2835-hdmi.yaml
|
|
+++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-hdmi.yaml
|
|
@@ -11,24 +11,58 @@ maintainers:
|
|
|
|
properties:
|
|
compatible:
|
|
- const: brcm,bcm2835-hdmi
|
|
+ enum:
|
|
+ - brcm,bcm2835-hdmi
|
|
+ - brcm,bcm2711-hdmi0
|
|
+ - brcm,bcm2711-hdmi1
|
|
|
|
reg:
|
|
+ oneOf:
|
|
+ - items:
|
|
+ - description: HDMI register range
|
|
+ - description: HD register range
|
|
+
|
|
+ - items:
|
|
+ - description: HDMI controller register range
|
|
+ - description: DVP register range
|
|
+ - description: HDMI PHY register range
|
|
+ - description: Rate Manager register range
|
|
+ - description: Packet RAM register range
|
|
+ - description: Metadata RAM register range
|
|
+ - description: CSC register range
|
|
+ - description: CEC register range
|
|
+ - description: HD register range
|
|
+
|
|
+ reg-names:
|
|
items:
|
|
- - description: HDMI register range
|
|
- - description: HD register range
|
|
+ - const: hdmi
|
|
+ - const: dvp
|
|
+ - const: phy
|
|
+ - const: rm
|
|
+ - const: packet
|
|
+ - const: metadata
|
|
+ - const: csc
|
|
+ - const: cec
|
|
+ - const: hd
|
|
|
|
interrupts:
|
|
minItems: 2
|
|
|
|
clocks:
|
|
- items:
|
|
- - description: The pixel clock
|
|
- - description: The HDMI state machine clock
|
|
+ oneOf:
|
|
+ - items:
|
|
+ - description: The pixel clock
|
|
+ - description: The HDMI state machine clock
|
|
+
|
|
+ - items:
|
|
+ - description: The HDMI state machine clock
|
|
|
|
clock-names:
|
|
- items:
|
|
- - const: pixel
|
|
+ oneOf:
|
|
+ - items:
|
|
+ - const: pixel
|
|
+ - const: hdmi
|
|
+
|
|
- const: hdmi
|
|
|
|
ddc:
|
|
@@ -51,15 +85,54 @@ properties:
|
|
dma-names:
|
|
const: audio-rx
|
|
|
|
+ resets:
|
|
+ maxItems: 1
|
|
+
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- - interrupts
|
|
- clocks
|
|
- ddc
|
|
|
|
additionalProperties: false
|
|
|
|
+if:
|
|
+ properties:
|
|
+ compatible:
|
|
+ contains:
|
|
+ enum:
|
|
+ - brcm,bcm2711-hdmi0
|
|
+ - brcm,bcm2711-hdmi1
|
|
+
|
|
+then:
|
|
+ properties:
|
|
+ reg:
|
|
+ minItems: 9
|
|
+
|
|
+ clocks:
|
|
+ maxItems: 1
|
|
+
|
|
+ clock-names:
|
|
+ maxItems: 1
|
|
+
|
|
+ required:
|
|
+ - reg-names
|
|
+ - resets
|
|
+
|
|
+else:
|
|
+ properties:
|
|
+ reg:
|
|
+ maxItems: 2
|
|
+
|
|
+ clocks:
|
|
+ minItems: 2
|
|
+
|
|
+ clock-names:
|
|
+ minItems: 2
|
|
+
|
|
+ required:
|
|
+ - interrupts
|
|
+
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/bcm2835.h>
|
|
@@ -77,4 +150,31 @@ examples:
|
|
clock-names = "pixel", "hdmi";
|
|
};
|
|
|
|
+ - |
|
|
+ hdmi0: hdmi@7ef00700 {
|
|
+ compatible = "brcm,bcm2711-hdmi0";
|
|
+ reg = <0x7ef00700 0x300>,
|
|
+ <0x7ef00300 0x200>,
|
|
+ <0x7ef00f00 0x80>,
|
|
+ <0x7ef00f80 0x80>,
|
|
+ <0x7ef01b00 0x200>,
|
|
+ <0x7ef01f00 0x400>,
|
|
+ <0x7ef00200 0x80>,
|
|
+ <0x7ef04300 0x100>,
|
|
+ <0x7ef20000 0x100>;
|
|
+ reg-names = "hdmi",
|
|
+ "dvp",
|
|
+ "phy",
|
|
+ "rm",
|
|
+ "packet",
|
|
+ "metadata",
|
|
+ "csc",
|
|
+ "cec",
|
|
+ "hd";
|
|
+ clocks = <&firmware_clocks 13>;
|
|
+ clock-names = "hdmi";
|
|
+ resets = <&dvp 0>;
|
|
+ ddc = <&ddc0>;
|
|
+ };
|
|
+
|
|
...
|