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f8b2bc550b
By dropping _machine_restart, users can provide more reliable or device-specific restart modes. _machine_halt was already removed in commitf4b687d1f0
("realtek: use kernel defined halt"), but quietly reintroduced in commit8faffa00cb
("realtek: add support for the RTL9300 timer"). Let's remove it again. Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Stijn Segers <foss@volatilesystems.org> Tested-by: Paul Fertser <fercerpav@gmail.com> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
117 lines
2.4 KiB
C
117 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Setup for the Realtek RTL838X SoC:
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* Memory, Timer and Serial
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*
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* Copyright (C) 2020 B. Koblitz
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* based on the original BSP by
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* Copyright (C) 2006-2012 Tony Wu (tonywu@realtek.com)
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*
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*/
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#include <linux/console.h>
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#include <linux/init.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/delay.h>
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#include <linux/of_fdt.h>
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#include <linux/irqchip.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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#include <asm/bootinfo.h>
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#include <asm/time.h>
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#include <asm/prom.h>
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#include <asm/smp-ops.h>
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#include "mach-rtl83xx.h"
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extern struct rtl83xx_soc_info soc_info;
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static void __init rtl838x_setup(void)
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{
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/* Setup System LED. Bit 15 then allows to toggle it */
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sw_w32_mask(0, 3 << 16, RTL838X_LED_GLB_CTRL);
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}
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static void __init rtl839x_setup(void)
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{
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/* Setup System LED. Bit 14 of RTL839X_LED_GLB_CTRL then allows to toggle it */
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sw_w32_mask(0, 3 << 15, RTL839X_LED_GLB_CTRL);
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}
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static void __init rtl930x_setup(void)
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{
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if (soc_info.id == 0x9302)
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sw_w32_mask(0, 3 << 13, RTL9302_LED_GLB_CTRL);
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else
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sw_w32_mask(0, 3 << 13, RTL930X_LED_GLB_CTRL);
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}
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static void __init rtl931x_setup(void)
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{
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sw_w32_mask(0, 3 << 12, RTL931X_LED_GLB_CTRL);
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}
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void __init plat_mem_setup(void)
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{
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void *dtb;
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set_io_port_base(KSEG1);
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if (fw_passed_dtb) /* UHI interface */
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dtb = (void *)fw_passed_dtb;
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else if (__dtb_start != __dtb_end)
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dtb = (void *)__dtb_start;
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else
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panic("no dtb found");
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/*
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* Load the devicetree. This causes the chosen node to be
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* parsed resulting in our memory appearing
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*/
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__dt_setup_arch(dtb);
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switch (soc_info.family) {
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case RTL8380_FAMILY_ID:
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rtl838x_setup();
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break;
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case RTL8390_FAMILY_ID:
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rtl839x_setup();
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break;
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case RTL9300_FAMILY_ID:
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rtl930x_setup();
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break;
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case RTL9310_FAMILY_ID:
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rtl931x_setup();
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break;
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}
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}
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void __init plat_time_init(void)
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{
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struct device_node *np;
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u32 freq = 500000000;
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of_clk_init(NULL);
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timer_probe();
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np = of_find_node_by_name(NULL, "cpus");
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if (!np) {
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pr_err("Missing 'cpus' DT node, using default frequency.");
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} else {
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if (of_property_read_u32(np, "frequency", &freq) < 0)
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pr_err("No 'frequency' property in DT, using default.");
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else
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pr_info("CPU frequency from device tree: %dMHz", freq / 1000000);
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of_node_put(np);
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}
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mips_hpt_frequency = freq / 2;
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}
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void __init arch_init_irq(void)
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{
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irqchip_init();
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}
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