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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
38 lines
1.1 KiB
Diff
38 lines
1.1 KiB
Diff
From 6ea428297717faa16056076f7dd5a69e49c58fe6 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 7 Aug 2022 23:34:35 -0500
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Subject: [PATCH 112/117] drm: panel: cwd686: Fix timings
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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drivers/gpu/drm/panel/panel-clockwork-cwd686.c | 18 +++++++++---------
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1 file changed, 9 insertions(+), 9 deletions(-)
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--- a/drivers/gpu/drm/panel/panel-clockwork-cwd686.c
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+++ b/drivers/gpu/drm/panel/panel-clockwork-cwd686.c
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@@ -31,15 +31,15 @@ struct cwd686 {
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};
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static const struct drm_display_mode default_mode = {
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- .clock = 54465,
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- .hdisplay = 480,
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- .hsync_start = 480 + 150,
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- .hsync_end = 480 + 150 + 24,
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- .htotal = 480 + 150 + 24 + 40,
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- .vdisplay = 1280,
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- .vsync_start = 1280 + 12,
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- .vsync_end = 1280 + 12 + 6,
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- .vtotal = 1280 + 12 + 6 + 10,
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+ .clock = 54465,
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+ .hdisplay = 480,
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+ .hsync_start = 480 + 64,
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+ .hsync_end = 480 + 64 + 40,
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+ .htotal = 480 + 64 + 40 + 110,
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+ .vdisplay = 1280,
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+ .vsync_start = 1280 + 16,
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+ .vsync_end = 1280 + 16 + 10,
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+ .vtotal = 1280 + 16 + 10 + 2,
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};
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static inline struct cwd686 *panel_to_cwd686(struct drm_panel *panel)
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