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Manually rebased: bcm27xx/patches-5.15/950-0421-Support-RPi-DPI-interface-in-mode6-for-18-bit-color.patch bcm27xx/patches-5.15/950-0706-media-i2c-imx219-Scale-the-pixel-clock-rate-for-the-.patch ramips/patches-5.15/810-uvc-add-iPassion-iP2970-support.patch Removed upstreamed: bcm27xx/patches-5.15/950-0707-drm-vc4-For-DPI-MEDIA_BUS_FMT_RGB565_1X16-is-mode-1-.patch[1] bcm27xx/patches-5.15/950-0596-drm-vc4-dpi-Add-option-for-inverting-pixel-clock-and.patch[2] ipq807x/0006-v5.16-arm64-dts-qcom-Fix-IPQ8074-PCIe-PHY-nodes.patch [3] ipq807x/0034-v6.1-arm64-dts-qcom-ipq8074-fix-PCIe-PHY-serdes-size.patch [4] ipq807x/0103-arm64-dts-qcom-ipq8074-fix-Gen2-PCIe-QMP-PHY.patch [5] ipq807x/0104-arm64-dts-qcom-ipq8074-fix-Gen3-PCIe-QMP-PHY.patch [6] ipq807x/0105-arm64-dts-qcom-ipq8074-correct-Gen2-PCIe-ranges.patch [7] ipq807x/0108-arm64-dts-qcom-ipq8074-fix-Gen3-PCIe-node.patch [8] ipq807x/0109-arm64-dts-qcom-ipq8074-correct-PCIe-QMP-PHY-output-c.patch [9] ipq807x/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch [10] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.99&id=d2991e6b30020e286f2dd9d3b4f43548c547caa6 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/gpu/drm/vc4/vc4_dpi.c?h=v5.15.100&id=8e04aaffb6de5f1ae61de7b671c1531172ccf429 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=a55a645aa303a3f7ec37db69822d5420657626da 4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=d9df682bcea57fa25f37bbf17eae56fa05662635 5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=7e6eeb5fb3aa9e5feffdb6e137dcc06f5f6410e1 6. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=e88204931d9a60634cd50bbc679f045439c4b91d 7. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=1563af0f28afd3b6d64ac79a2aecced3969c90bf 8. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=feb8c71f015d416f1afe90e1f62cf51e47376c67 9. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=69c7a270357a7d50ffd3471b14c60250041200e3 10. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=dd3d021ae5471d98adf81f1e897431c8657d0a18 Build system: x86_64 Build-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3 Run-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me> Tested-by: Robert Marko <robimarko@gmail.com> #ipq807x/Dynalink WRX36 Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de> #ipq807x/ax3600, x86_64/FW-7543B, ath79/tl-wdr3600, ipq806x/g10, ipq806x/nbg6817
109 lines
3.8 KiB
Diff
109 lines
3.8 KiB
Diff
From 7760958a0fb50b0e20f88e220f55798ec154c41e Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Sat, 8 Jan 2022 13:24:10 +0000
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Subject: [PATCH] drm/vc4: Add alpha_blend_mode property to each plane.
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Move from only supporting the default of pre-multiplied
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alpha to supporting user specified blend mode using the
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standardised property.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_plane.c | 62 ++++++++++++++++++++++++++-------
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1 file changed, 49 insertions(+), 13 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -666,6 +666,48 @@ static const u32 colorspace_coeffs[2][DR
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}
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};
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+static u32 vc4_hvs4_get_alpha_blend_mode(struct drm_plane_state *state)
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+{
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+ if (!state->fb->format->has_alpha)
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+ return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_FIXED,
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+ SCALER_POS2_ALPHA_MODE);
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+
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+ switch (state->pixel_blend_mode) {
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+ case DRM_MODE_BLEND_PIXEL_NONE:
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+ return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_FIXED,
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+ SCALER_POS2_ALPHA_MODE);
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+ default:
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+ case DRM_MODE_BLEND_PREMULTI:
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+ return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_PIPELINE,
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+ SCALER_POS2_ALPHA_MODE) |
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+ SCALER_POS2_ALPHA_PREMULT;
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+ case DRM_MODE_BLEND_COVERAGE:
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+ return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_PIPELINE,
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+ SCALER_POS2_ALPHA_MODE);
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+ }
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+}
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+
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+static u32 vc4_hvs5_get_alpha_blend_mode(struct drm_plane_state *state)
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+{
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+ if (!state->fb->format->has_alpha)
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+ return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
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+ SCALER5_CTL2_ALPHA_MODE);
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+
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+ switch (state->pixel_blend_mode) {
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+ case DRM_MODE_BLEND_PIXEL_NONE:
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+ return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
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+ SCALER5_CTL2_ALPHA_MODE);
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+ default:
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+ case DRM_MODE_BLEND_PREMULTI:
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+ return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_PIPELINE,
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+ SCALER5_CTL2_ALPHA_MODE) |
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+ SCALER5_CTL2_ALPHA_PREMULT;
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+ case DRM_MODE_BLEND_COVERAGE:
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+ return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_PIPELINE,
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+ SCALER5_CTL2_ALPHA_MODE);
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+ }
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+}
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+
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/* Writes out a full display list for an active plane to the plane's
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* private dlist state.
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*/
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@@ -948,13 +990,8 @@ static int vc4_plane_mode_set(struct drm
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/* Position Word 2: Source Image Size, Alpha */
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vc4_state->pos2_offset = vc4_state->dlist_count;
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vc4_dlist_write(vc4_state,
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- VC4_SET_FIELD(fb->format->has_alpha ?
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- SCALER_POS2_ALPHA_MODE_PIPELINE :
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- SCALER_POS2_ALPHA_MODE_FIXED,
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- SCALER_POS2_ALPHA_MODE) |
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(mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0) |
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- (fb->format->has_alpha ?
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- SCALER_POS2_ALPHA_PREMULT : 0) |
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+ vc4_hvs4_get_alpha_blend_mode(state) |
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VC4_SET_FIELD(vc4_state->src_w[0],
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SCALER_POS2_WIDTH) |
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VC4_SET_FIELD(vc4_state->src_h[0],
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@@ -999,14 +1036,9 @@ static int vc4_plane_mode_set(struct drm
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vc4_dlist_write(vc4_state,
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VC4_SET_FIELD(state->alpha >> 4,
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SCALER5_CTL2_ALPHA) |
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- (fb->format->has_alpha ?
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- SCALER5_CTL2_ALPHA_PREMULT : 0) |
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+ vc4_hvs5_get_alpha_blend_mode(state) |
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(mix_plane_alpha ?
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- SCALER5_CTL2_ALPHA_MIX : 0) |
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- VC4_SET_FIELD(fb->format->has_alpha ?
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- SCALER5_CTL2_ALPHA_MODE_PIPELINE :
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- SCALER5_CTL2_ALPHA_MODE_FIXED,
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- SCALER5_CTL2_ALPHA_MODE)
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+ SCALER5_CTL2_ALPHA_MIX : 0)
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);
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/* Position Word 1: Scaled Image Dimensions. */
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@@ -1496,6 +1528,10 @@ struct drm_plane *vc4_plane_init(struct
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drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
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drm_plane_create_alpha_property(plane);
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+ drm_plane_create_blend_mode_property(plane,
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+ BIT(DRM_MODE_BLEND_PIXEL_NONE) |
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+ BIT(DRM_MODE_BLEND_PREMULTI) |
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+ BIT(DRM_MODE_BLEND_COVERAGE));
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drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
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DRM_MODE_ROTATE_0 |
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DRM_MODE_ROTATE_180 |
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