openwrt/target/linux/layerscape/patches-5.4/302-dts-0079-arm64-dts-ls1028a-Fix-interrupt-map-property-of-PCIe.patch
Hauke Mehrtens 7bf7f78891 layerscape: Fix build in dtb
This fixes a kernel build problem.
The removed parts of the patch are already applied upstream.

Fixes: b4ed8a9275 ("kernel: bump 5.4 to 5.4.154")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 9501ce909f)
2021-10-22 22:25:41 +02:00

46 lines
1.9 KiB
Diff

From e41ad4213ce6742646c9dfed661289e69d5af5c1 Mon Sep 17 00:00:00 2001
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Fri, 2 Aug 2019 16:42:53 +0800
Subject: [PATCH] arm64: dts: ls1028a: Fix interrupt-map property of PCIe nodes
The current interrupt-map entries lost the 'parent unit address',
it will result in fail to allocate legacy INTx interrupts.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -693,10 +693,10 @@
msi-parent = <&its>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0000 0 0 1 &gic GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
- <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
- <0000 0 0 3 &gic GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
- <0000 0 0 4 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -718,10 +718,10 @@
msi-parent = <&its>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0000 0 0 1 &gic GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
- <0000 0 0 2 &gic GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
- <0000 0 0 3 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <0000 0 0 4 &gic GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};