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32c74552b2
All updated automatically. Compile-tested on: lantiq/xrx200, armvirt/64 Runtime-tested on: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
46 lines
1.7 KiB
Diff
46 lines
1.7 KiB
Diff
From b5c498026a95f9d80be23711dd6c178cc78d6c33 Mon Sep 17 00:00:00 2001
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From: Peter Chen <peter.chen@nxp.com>
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Date: Wed, 15 Aug 2018 14:59:55 +0800
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Subject: [PATCH] MLK-18794-1 usb: host: xhci: add .bus_suspend override
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Some platforms (eg: Cadence USB3) have special requirements to add
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platform USB register setting between xhci_bus_suspend and
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platform USB controller suspend routine. Eg, The Cadence USB3 needs
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RX detect clock switch from 24Mhz to 32Khz within 100ms after set
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port to U3, but sometimes, for USB3 HUB connection, the USB2
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bus suspend will cost more than 100ms, and introduce the disconnection
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before the PHY enters low power mode, then the state is in mess from
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controller side.
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So in this commit, we introduce .bus_suspend for xhci_driver_overrides
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for above use cases.
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Signed-off-by: Peter Chen <peter.chen@nxp.com>
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(cherry picked from commit f6baa57913ceb40da14a945820cb87e8d6ceb7c7)
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---
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drivers/usb/host/xhci.c | 2 ++
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drivers/usb/host/xhci.h | 1 +
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2 files changed, 3 insertions(+)
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--- a/drivers/usb/host/xhci.c
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+++ b/drivers/usb/host/xhci.c
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@@ -5414,6 +5414,8 @@ void xhci_init_driver(struct hc_driver *
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drv->check_bandwidth = over->check_bandwidth;
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if (over->reset_bandwidth)
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drv->reset_bandwidth = over->reset_bandwidth;
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+ if (over->bus_suspend)
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+ drv->bus_suspend = over->bus_suspend;
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}
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}
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EXPORT_SYMBOL_GPL(xhci_init_driver);
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--- a/drivers/usb/host/xhci.h
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+++ b/drivers/usb/host/xhci.h
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@@ -1920,6 +1920,7 @@ struct xhci_driver_overrides {
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int (*start)(struct usb_hcd *hcd);
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int (*check_bandwidth)(struct usb_hcd *, struct usb_device *);
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void (*reset_bandwidth)(struct usb_hcd *, struct usb_device *);
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+ int (*bus_suspend)(struct usb_hcd *hcd);
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};
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#define XHCI_CFC_DELAY 10
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