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14940aee45
Removed upstreamed: target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch The following patch does not apply to upstream any more and needs some more work to make it work fully again. I am not sure if we are still able to set the UART to a none standard baud rate. target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch These patches needed manually changes: target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch All others updated automatically. Compile-tested on: malta/le, armvirt/64, lantiq/xrx200 Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
106 lines
4.7 KiB
Diff
106 lines
4.7 KiB
Diff
From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Mon, 31 Jul 2017 20:10:36 +0200
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Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
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---
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arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/arch/mips/bcm63xx/clk.c
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+++ b/arch/mips/bcm63xx/clk.c
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@@ -495,6 +495,8 @@ static struct clk_lookup bcm3368_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -511,7 +513,9 @@ static struct clk_lookup bcm6318_clks[]
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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+ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -525,7 +529,10 @@ static struct clk_lookup bcm6328_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -538,6 +545,7 @@ static struct clk_lookup bcm6338_clks[]
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -552,6 +560,7 @@ static struct clk_lookup bcm6345_clks[]
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -566,6 +575,7 @@ static struct clk_lookup bcm6348_clks[]
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -582,6 +592,8 @@ static struct clk_lookup bcm6358_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -601,7 +613,10 @@ static struct clk_lookup bcm6362_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -617,6 +632,8 @@ static struct clk_lookup bcm6368_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -631,7 +648,10 @@ static struct clk_lookup bcm63268_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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