mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 07:46:48 +00:00
42d9bccadb
Refreshed all patches. Remove upstreamed: - 100-powerpc-4xx-uic-clear-pending-interrupt-after-irq-ty.patch - 950-0309-usb-dwc2-Disable-all-EP-s-on-disconnect.patch - 950-0310-usb-dwc2-Fix-disable-all-EP-s-on-disconnect.patch Fixes: - CVE-2019-13648 - CVE-2019-3900 - CVE-2019-10207 Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
414 lines
8.4 KiB
Diff
414 lines
8.4 KiB
Diff
From 004eb24e939b5b31f828333f37fb5cb2a877d6f2 Mon Sep 17 00:00:00 2001
|
|
From: Kristian Evensen <kristian.evensen@gmail.com>
|
|
Date: Sun, 17 Jun 2018 14:41:47 +0200
|
|
Subject: [PATCH] arm: dts: Add Unielec U7623 DTS
|
|
|
|
---
|
|
arch/arm/boot/dts/Makefile | 1 +
|
|
.../dts/mt7623a-unielec-u7623-02-emmc-512M.dts | 18 +
|
|
.../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi | 366 +++++++++++++++++++++
|
|
3 files changed, 385 insertions(+)
|
|
create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512M.dts
|
|
create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
|
|
|
|
--- a/arch/arm/boot/dts/Makefile
|
|
+++ b/arch/arm/boot/dts/Makefile
|
|
@@ -1193,6 +1193,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
|
|
mt7623a-rfb-nand.dtb \
|
|
mt7623n-rfb-emmc.dtb \
|
|
mt7623n-bananapi-bpi-r2.dtb \
|
|
+ mt7623a-unielec-u7623-02-emmc-512M.dtb \
|
|
mt8127-moose.dtb \
|
|
mt8135-evbp1.dtb
|
|
dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512M.dts
|
|
@@ -0,0 +1,18 @@
|
|
+/*
|
|
+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
|
|
+ *
|
|
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+#include "mt7623a-unielec-u7623-02-emmc.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "UniElec U7623-02 eMMC (512M RAM)";
|
|
+ compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
|
|
+
|
|
+ memory@80000000 {
|
|
+ device_type = "memory";
|
|
+ reg = <0 0x80000000 0 0x20000000>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
|
|
@@ -0,0 +1,366 @@
|
|
+/*
|
|
+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
|
|
+ *
|
|
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+ */
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+#include "mt7623.dtsi"
|
|
+#include "mt6323.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
|
|
+
|
|
+ aliases {
|
|
+ serial2 = &uart2;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs";
|
|
+ stdout-path = "serial2:115200n8";
|
|
+ };
|
|
+
|
|
+ cpus {
|
|
+ cpu@0 {
|
|
+ proc-supply = <&mt6323_vproc_reg>;
|
|
+ };
|
|
+
|
|
+ cpu@1 {
|
|
+ proc-supply = <&mt6323_vproc_reg>;
|
|
+ };
|
|
+
|
|
+ cpu@2 {
|
|
+ proc-supply = <&mt6323_vproc_reg>;
|
|
+ };
|
|
+
|
|
+ cpu@3 {
|
|
+ proc-supply = <&mt6323_vproc_reg>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ reg_1p8v: regulator-1p8v {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "fixed-1.8V";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-boot-on;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ reg_3p3v: regulator-3p3v {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "fixed-3.3V";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ reg_5v: regulator-5v {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "fixed-5V";
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ regulator-boot-on;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&key_pins_a>;
|
|
+
|
|
+ factory {
|
|
+ label = "factory";
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ gpios = <&pio 256 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&led_pins_unielec>;
|
|
+
|
|
+ led3 {
|
|
+ label = "u7623-01:green:led3";
|
|
+ gpios = <&pio 14 GPIO_ACTIVE_LOW>;
|
|
+ default-state = "off";
|
|
+ };
|
|
+
|
|
+ led4 {
|
|
+ label = "u7623-01:green:led4";
|
|
+ gpios = <&pio 15 GPIO_ACTIVE_LOW>;
|
|
+ default-state = "off";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mt7530: switch@0 {
|
|
+ compatible = "mediatek,mt7530";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&crypto {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+ð {
|
|
+ status = "okay";
|
|
+
|
|
+ gmac0: mac@0 {
|
|
+ compatible = "mediatek,eth-mac";
|
|
+ reg = <0>;
|
|
+ phy-mode = "trgmii";
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ pause;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio: mdio-bus {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ phy5: ethernet-phy@5 {
|
|
+ reg = <5>;
|
|
+ phy-mode = "rgmii-rxid";
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&mt7530 {
|
|
+ compatible = "mediatek,mt7530";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ mediatek,mcm;
|
|
+ resets = <ðsys 2>;
|
|
+ reset-names = "mcm";
|
|
+ core-supply = <&mt6323_vpa_reg>;
|
|
+ io-supply = <&mt6323_vemc3v3_reg>;
|
|
+
|
|
+ dsa,mii-bus = <&mdio>;
|
|
+
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <0>;
|
|
+
|
|
+ port@0 {
|
|
+ reg = <0>;
|
|
+ label = "lan0";
|
|
+ cpu = <&cpu_port0>;
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ reg = <1>;
|
|
+ label = "lan1";
|
|
+ cpu = <&cpu_port0>;
|
|
+ };
|
|
+
|
|
+ port@2 {
|
|
+ reg = <2>;
|
|
+ label = "lan2";
|
|
+ cpu = <&cpu_port0>;
|
|
+ };
|
|
+
|
|
+ port@3 {
|
|
+ reg = <3>;
|
|
+ label = "lan3";
|
|
+ cpu = <&cpu_port0>;
|
|
+ };
|
|
+
|
|
+ port@4 {
|
|
+ reg = <4>;
|
|
+ label = "wan";
|
|
+ cpu = <&cpu_port0>;
|
|
+ };
|
|
+
|
|
+ cpu_port0: port@6 {
|
|
+ reg = <6>;
|
|
+ label = "cpu";
|
|
+ ethernet = <&gmac0>;
|
|
+ phy-mode = "trgmii";
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&mmc0 {
|
|
+ pinctrl-names = "default", "state_uhs";
|
|
+ pinctrl-0 = <&mmc0_pins_default>;
|
|
+ pinctrl-1 = <&mmc0_pins_uhs>;
|
|
+ status = "okay";
|
|
+ bus-width = <8>;
|
|
+ max-frequency = <50000000>;
|
|
+ cap-mmc-highspeed;
|
|
+ vmmc-supply = <®_3p3v>;
|
|
+ vqmmc-supply = <®_1p8v>;
|
|
+ non-removable;
|
|
+};
|
|
+
|
|
+&pio {
|
|
+ key_pins_a: keys-alt {
|
|
+ pins-keys {
|
|
+ pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
|
|
+ <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
|
|
+ input-enable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ led_pins_unielec: leds-unielec {
|
|
+ pins-leds {
|
|
+ pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
|
|
+ <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mmc0_pins_default: mmc0default {
|
|
+ pins_cmd_dat {
|
|
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
|
|
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
|
|
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
|
|
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
|
|
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
|
|
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
|
|
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
|
|
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
|
|
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
|
|
+ input-enable;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ pins_clk {
|
|
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
|
|
+ bias-pull-down;
|
|
+ };
|
|
+
|
|
+ pins_rst {
|
|
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mmc0_pins_uhs: mmc0 {
|
|
+ pins_cmd_dat {
|
|
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
|
|
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
|
|
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
|
|
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
|
|
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
|
|
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
|
|
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
|
|
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
|
|
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
|
|
+ input-enable;
|
|
+ drive-strength = <MTK_DRIVE_2mA>;
|
|
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
+ };
|
|
+
|
|
+ pins_clk {
|
|
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
|
|
+ drive-strength = <MTK_DRIVE_2mA>;
|
|
+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
|
|
+ };
|
|
+
|
|
+ pins_rst {
|
|
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pwm_pins_a: pwm@0 {
|
|
+ pins_pwm {
|
|
+ pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
|
|
+ <MT7623_PIN_204_PWM1_FUNC_PWM1>,
|
|
+ <MT7623_PIN_205_PWM2_FUNC_PWM2>,
|
|
+ <MT7623_PIN_206_PWM3_FUNC_PWM3>,
|
|
+ <MT7623_PIN_207_PWM4_FUNC_PWM4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ uart2_pins_b: uart@2 {
|
|
+ pins_dat {
|
|
+ pinmux = <MT7623_PIN_200_URXD2_FUNC_URXD2>,
|
|
+ <MT7623_PIN_201_UTXD2_FUNC_UTXD2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie_default: pcie_pin_default {
|
|
+ pins_cmd_dat {
|
|
+ pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
|
|
+ <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pwm {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwm_pins_a>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwrap {
|
|
+ mt6323 {
|
|
+ mt6323led: led {
|
|
+ compatible = "mediatek,mt6323-led";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ led@0 {
|
|
+ reg = <0>;
|
|
+ label = "led0";
|
|
+ default-state = "off";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart2_pins_b>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb1 {
|
|
+ vusb33-supply = <®_3p3v>;
|
|
+ vbus-supply = <®_3p3v>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u3phy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u3phy2 {
|
|
+ status = "okay";
|
|
+ mediatek,phy-switch = <&hifsys>;
|
|
+};
|
|
+
|
|
+&pcie {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_default>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcie@1,0 {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ pcie@2,0 {
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie1_phy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|